diff options
Diffstat (limited to 'src/mainboard/google/brya')
| -rw-r--r-- | src/mainboard/google/brya/variants/quandiso/fw_config.c | 3 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/quandiso/overridetree.cb | 7 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/brya/variants/quandiso/fw_config.c b/src/mainboard/google/brya/variants/quandiso/fw_config.c index c5ac0d275e..dc286a8f50 100644 --- a/src/mainboard/google/brya/variants/quandiso/fw_config.c +++ b/src/mainboard/google/brya/variants/quandiso/fw_config.c @@ -75,7 +75,8 @@ static const struct pad_config disable_wifi_pch_susclk[] = { void fw_config_gpio_padbased_override(struct pad_config *padbased_table) { - if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) { + if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE)) && + !fw_config_probe(FW_CONFIG(DB_USB, DB_LTE))) { printk(BIOS_INFO, "Disable LTE-related GPIO pins.\n"); gpio_padbased_override(padbased_table, lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); diff --git a/src/mainboard/google/brya/variants/quandiso/overridetree.cb b/src/mainboard/google/brya/variants/quandiso/overridetree.cb index 29a4cee08c..205fd2bc3b 100644 --- a/src/mainboard/google/brya/variants/quandiso/overridetree.cb +++ b/src/mainboard/google/brya/variants/quandiso/overridetree.cb @@ -2,7 +2,7 @@ fw_config field DB_USB 0 1 option DB_NONE 0 option DB_1C_1A 1 - option DB_1C 2 + option DB_LTE 2 option DB_1C_LTE 3 end field WIFI_SAR_ID 2 3 @@ -333,6 +333,7 @@ chip soc/intel/alderlake register "reg_adv_ctrl19" = "0xf0" register "reg_adv_ctrl20" = "0xf0" device i2c 28 on + probe DB_USB DB_LTE probe DB_USB DB_1C_LTE end end @@ -444,7 +445,6 @@ chip soc/intel/alderlake use tcss_usb3_port2 as usb3_port device generic 1 alias conn1 on probe DB_USB DB_1C_1A - probe DB_USB DB_1C probe DB_USB DB_1C_LTE end end @@ -468,7 +468,6 @@ chip soc/intel/alderlake register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref tcss_usb3_port2 on probe DB_USB DB_1C_1A - probe DB_USB DB_1C probe DB_USB DB_1C_LTE end end @@ -492,7 +491,6 @@ chip soc/intel/alderlake register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" device ref usb2_port2 on probe DB_USB DB_1C_1A - probe DB_USB DB_1C probe DB_USB DB_1C_LTE end end @@ -565,6 +563,7 @@ chip soc/intel/alderlake register "desc" = ""USB3 WWAN"" register "type" = "UPC_TYPE_INTERNAL" device ref usb3_port2 on + probe DB_USB DB_LTE probe DB_USB DB_1C_LTE end end |