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-rw-r--r--src/mainboard/google/brya/variants/yaviks/overridetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/yaviks/overridetree.cb b/src/mainboard/google/brya/variants/yaviks/overridetree.cb
index 65da4faa65..7f72f8c88b 100644
--- a/src/mainboard/google/brya/variants/yaviks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/yaviks/overridetree.cb
@@ -59,7 +59,7 @@ chip soc/intel/alderlake
# [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
# [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
# [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
- register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B223b"
+ register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B193b"
# EMMC RX CMD/DATA Delay 2
# Refer to EDS-Vol2-42.3.12.
@@ -70,7 +70,7 @@ chip soc/intel/alderlake
# 11: Reserved
# [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
# [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
- register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1004b"
+ register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10004"
# EMMC Rx Strobe Delay
# Refer to EDS-Vol2-42.3.11.