diff options
| author | Chia-Ling Hou <chia-ling.hou@intel.com> | 2023-06-13 13:54:54 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-03 12:46:40 +0000 |
| commit | 8c9ec5af5326fc74d245c8fd1cf5c412099170c5 (patch) | |
| tree | 444baf1b65b3705fb00d9b7e0606f1c7e4a4f5af /src/mainboard/google/brya/variants | |
| parent | 165cbe505aeae882fab39ec2087b518ea6cf2059 (diff) | |
mb/google/nissa/yaviks: Tune eMMC DLL value for boot issue
Resolve boot issue by tuning RX HS50 and HS200.
BUG=b:265611305
TEST=Reboot test 2500 times pass
Change-Id: I8a2727dc0ce9dc86c6bfb6d85567afee1734db62
Signed-off-by: Chia-Ling Hou <chia-ling.hou@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75812
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants')
| -rw-r--r-- | src/mainboard/google/brya/variants/yaviks/overridetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/yaviks/overridetree.cb b/src/mainboard/google/brya/variants/yaviks/overridetree.cb index 65da4faa65..7f72f8c88b 100644 --- a/src/mainboard/google/brya/variants/yaviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/yaviks/overridetree.cb @@ -59,7 +59,7 @@ chip soc/intel/alderlake # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119. # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B223b" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B193b" # EMMC RX CMD/DATA Delay 2 # Refer to EDS-Vol2-42.3.12. @@ -70,7 +70,7 @@ chip soc/intel/alderlake # 11: Reserved # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39. # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1004b" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10004" # EMMC Rx Strobe Delay # Refer to EDS-Vol2-42.3.11. |