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Diffstat (limited to 'src/mainboard/google/brya/variants')
-rw-r--r--src/mainboard/google/brya/variants/brya0/overridetree.cb8
-rw-r--r--src/mainboard/google/brya/variants/brya4es/overridetree.cb8
2 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb
index c654965e85..a94410354b 100644
--- a/src/mainboard/google/brya/variants/brya0/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb
@@ -755,7 +755,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
@@ -769,7 +769,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -782,7 +782,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
@@ -796,7 +796,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/brya/variants/brya4es/overridetree.cb b/src/mainboard/google/brya/variants/brya4es/overridetree.cb
index af0f43ebcd..87c56c8960 100644
--- a/src/mainboard/google/brya/variants/brya4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya4es/overridetree.cb
@@ -678,7 +678,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
@@ -692,7 +692,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -705,7 +705,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
@@ -719,7 +719,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi