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-rw-r--r--src/mainboard/google/brya/variants/taeko4es/overridetree.cb42
1 files changed, 6 insertions, 36 deletions
diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
index b0a5de6517..11d572f96f 100644
--- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
@@ -441,24 +441,14 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
end
@@ -473,24 +463,14 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(1, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_RIGHT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_OVAL,
- .group = ACPI_PLD_GROUP(2, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A
end
@@ -505,12 +485,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -524,12 +499,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-A Port (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "{
- .visible = true,
- .panel = PLD_PANEL_LEFT,
- .horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
- .shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(3, 1)}"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port1 on end
end
end