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Diffstat (limited to 'src/mainboard/google/brya/variants/redrix')
-rw-r--r--src/mainboard/google/brya/variants/redrix/gpio.c6
-rw-r--r--src/mainboard/google/brya/variants/redrix/overridetree.cb4
2 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/gpio.c b/src/mainboard/google/brya/variants/redrix/gpio.c
index b82f4035cb..dfa68f9872 100644
--- a/src/mainboard/google/brya/variants/redrix/gpio.c
+++ b/src/mainboard/google/brya/variants/redrix/gpio.c
@@ -134,6 +134,12 @@ static const struct pad_config early_gpio_table[] = {
static const struct pad_config romstage_gpio_table[] = {
/* B4 : PROC_GP3 ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_B4, 1, DEEP),
+
+ /* D1 : ISH_GP1 ==> FP_RST_ODL */
+ PAD_CFG_GPO(GPP_D1, 0, DEEP),
+ /* D2 : ISH_GP2 ==> EN_FP_PWR */
+ PAD_CFG_GPO(GPP_D2, 0, DEEP),
+
/* F21 : EXT_PWR_GATE2# ==> WWAN_FCPO_L (set here for correct power sequencing) */
PAD_CFG_GPO(GPP_F21, 1, DEEP),
};
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb
index 8ee8710672..68e25c8c80 100644
--- a/src/mainboard/google/brya/variants/redrix/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb
@@ -449,6 +449,10 @@ chip soc/intel/alderlake
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
register "wake" = "GPE0_DW2_15"
+ register "has_power_resource" = "1"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
+ register "enable_delay_ms" = "3"
device spi 0 on end
end # FPMCU
end