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Diffstat (limited to 'src/mainboard/google/brya/variants/gimble')
-rw-r--r--src/mainboard/google/brya/variants/gimble/gpio.c8
-rw-r--r--src/mainboard/google/brya/variants/gimble/overridetree.cb44
2 files changed, 41 insertions, 11 deletions
diff --git a/src/mainboard/google/brya/variants/gimble/gpio.c b/src/mainboard/google/brya/variants/gimble/gpio.c
index 2ea9f90995..04829e5a89 100644
--- a/src/mainboard/google/brya/variants/gimble/gpio.c
+++ b/src/mainboard/google/brya/variants/gimble/gpio.c
@@ -116,10 +116,10 @@ static const struct pad_config early_gpio_table[] = {
/* B4 : PROC_GP3 ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_B4, 0, DEEP),
- /* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
- PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2),
- /* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
- PAD_CFG_NF(GPP_B8, NONE, DEEP, NF2),
+ /* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA_P2 */
+ PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
+ /* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL_P2 */
+ PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
/*
* D1 : ISH_GP1 ==> FP_RST_ODL
* FP_RST_ODL comes out of reset as hi-z and does not have an external pull-down.
diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb
index 8b6daf2b29..47e81d8687 100644
--- a/src/mainboard/google/brya/variants/gimble/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb
@@ -40,6 +40,36 @@ chip soc/intel/alderlake
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Type-A DB Port
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI1 | Fingerprint MCU |
+ #| I2C0 | Audio and WFC |
+ #| I2C1 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| I2C2 | SAR0 |
+ #| I2C3 | Touchscreen |
+ #| | |
+ #| | |
+ #| I2C5 | Trackpad |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[1] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 600,
+ .fall_time_ns = 400,
+ .data_hold_time_ns = 50,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 650,
+ .fall_time_ns = 400,
+ .data_hold_time_ns = 50,
+ },
+ }"
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
@@ -156,6 +186,13 @@ chip soc/intel/alderlake
end
end #I2C0
device ref i2c1 on
+ chip drivers/i2c/tpm
+ register "hid" = ""GOOG0005""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
+ device i2c 50 on end
+ end
+ end
+ device ref i2c3 on
chip drivers/i2c/hid
register "generic.hid" = ""ELAN9050""
register "generic.desc" = ""ELAN Touchscreen""
@@ -176,13 +213,6 @@ chip soc/intel/alderlake
device i2c 0x15 on end
end
end
- device ref i2c3 on
- chip drivers/i2c/tpm
- register "hid" = ""GOOG0005""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
- device i2c 50 on end
- end
- end
device ref i2c5 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""