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path: root/src/mainboard/google/brya/variants/brya0/overridetree.cb
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Diffstat (limited to 'src/mainboard/google/brya/variants/brya0/overridetree.cb')
-rw-r--r--src/mainboard/google/brya/variants/brya0/overridetree.cb22
1 files changed, 19 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb
index 63ffe2f4cb..0f1c693529 100644
--- a/src/mainboard/google/brya/variants/brya0/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb
@@ -189,7 +189,23 @@ chip soc/intel/alderlake
end
end
device ref pcie_rp6 on
- probe DB_LTE LTE_PCIE
+ # Enable WWAN PCIE 6 using clk 5
+ register "pch_pcie_rp[PCH_RP(6)]" = "{
+ .clk_src = 5,
+ .clk_req = 5,
+ .flags = PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ chip soc/intel/common/block/pcie/rtd3
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
+ register "reset_off_delay_ms" = "20"
+ # register "reset_delay_ms" = "1000"
+ register "srcclk_pin" = "5"
+ register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
+ register "skip_on_off_support" = "true"
+ device generic 0 alias rp6_rtd3 on
+ probe DB_LTE LTE_PCIE
+ end
+ end
chip drivers/wwan/fm
register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
@@ -197,11 +213,11 @@ chip soc/intel/alderlake
register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
register "add_acpi_dma_property" = "true"
use rp6_rtd3 as rtd3dev
- device generic 0 alias rp6_wwan on
+ device generic 0 on
probe DB_LTE LTE_PCIE
end
end
-
+ probe DB_LTE LTE_PCIE
end
device ref tcss_dma0 on
chip drivers/intel/usb4/retimer