diff options
Diffstat (limited to 'src/mainboard/google/brya/variants/anahera4es')
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera4es/overridetree.cb | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 616224d09e..0b6db9f95e 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -22,17 +22,6 @@ fw_config end end chip soc/intel/alderlake - # This disables autonomous GPIO power management, otherwise - # old cr50 FW only supports short pulses; need to clarify - # the minimum PCH IRQ pulse width with Intel, b/180111628 - register "gpio_override_pm" = "1" - register "gpio_pm[COMM_0]" = "0" - register "gpio_pm[COMM_1]" = "0" - register "gpio_pm[COMM_2]" = "0" - register "gpio_pm[COMM_3]" = "0" - register "gpio_pm[COMM_4]" = "0" - register "gpio_pm[COMM_5]" = "0" - register "SaGv" = "SaGv_Enabled" # Intel Common SoC Config #+-------------------+---------------------------+ |