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-rw-r--r--src/mainboard/google/brya/chromeos-nissa-32MiB.fmd51
1 files changed, 0 insertions, 51 deletions
diff --git a/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd b/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd
deleted file mode 100644
index 00e7997819..0000000000
--- a/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd
+++ /dev/null
@@ -1,51 +0,0 @@
-FLASH 32M {
- SI_ALL 3712K {
- SI_DESC 4K
- SI_ME
- }
- SI_BIOS 29056K {
- RW_SECTION_A 4376K {
- VBLOCK_A 8K
- FW_MAIN_A(CBFS)
- RW_FWID_A 64
- }
- RW_LEGACY(CBFS) 1M
- RW_MISC 152K {
- UNIFIED_MRC_CACHE(PRESERVE) 128K {
- RECOVERY_MRC_CACHE 64K
- RW_MRC_CACHE 64K
- }
- RW_ELOG(PRESERVE) 4K
- RW_SHARED 4K {
- SHARED_DATA 4K
- }
- RW_VPD(PRESERVE) 8K
- RW_NVRAM(PRESERVE) 8K
- }
- # RW UNUSED Region 1.
- RW_UNUSED_1 7120K
- # This section starts at the 16M boundary in SPI flash.
- # ADL does not support a region crossing this boundary,
- # because the SPI flash is memory-mapped into two non-
- # contiguous windows.
- RW_SECTION_B 4376K {
- VBLOCK_B 8K
- FW_MAIN_B(CBFS)
- RW_FWID_B 64
- }
- # RW UNUSED Region 2.
- RW_UNUSED_2 7912K
- # Make WP_RO region align with SPI vendor
- # memory protected range specification.
- WP_RO 4M {
- RO_VPD(PRESERVE) 16K
- RO_GSCVD 8K
- RO_SECTION {
- FMAP 2K
- RO_FRID 64
- GBB@4K 12K
- COREBOOT(CBFS)
- }
- }
- }
-}