aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/facebook/fbg1701/devicetree.cb
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/facebook/fbg1701/devicetree.cb')
-rw-r--r--src/mainboard/facebook/fbg1701/devicetree.cb131
1 files changed, 131 insertions, 0 deletions
diff --git a/src/mainboard/facebook/fbg1701/devicetree.cb b/src/mainboard/facebook/fbg1701/devicetree.cb
new file mode 100644
index 0000000000..3c82a034b4
--- /dev/null
+++ b/src/mainboard/facebook/fbg1701/devicetree.cb
@@ -0,0 +1,131 @@
+chip soc/intel/braswell
+
+ ############################################################
+ # Set the parameters for MemoryInit
+ ############################################################
+
+ register "PcdMrcInitTsegSize" = "8" # SMM Region size in MiB
+
+ register "PcdMrcInitMmioSize" = "0x0800"
+ register "PcdMrcInitSpdAddr1" = "0xa0"
+ register "PcdMrcInitSpdAddr2" = "0xa2"
+ register "PcdIgdDvmt50PreAlloc" = "1"
+ register "PcdApertureSize" = "2"
+ register "PcdGttSize" = "1"
+ register "PcdDvfsEnable" = "0"
+ register "PcdCaMirrorEn" = "1"
+
+ ############################################################
+ # Set the parameters for SiliconInit
+ ############################################################
+
+ register "PcdSdcardMode" = "PCH_DISABLED"
+ register "PcdEnableHsuart0" = "0"
+ register "PcdEnableHsuart1" = "0"
+ register "PcdEnableAzalia" = "1"
+ register "PcdEnableXhci" = "1"
+ register "PcdEnableLpe" = "0"
+ register "PcdEnableDma0" = "0"
+ register "PcdEnableDma1" = "0"
+ register "PcdEnableI2C0" = "0"
+ register "PcdEnableI2C1" = "0"
+ register "PcdEnableI2C2" = "0"
+ register "PcdEnableI2C3" = "0"
+ register "PcdEnableI2C4" = "0"
+ register "PcdEnableI2C5" = "0"
+ register "PcdEnableI2C6" = "0"
+ register "PunitPwrConfigDisable" = "0" # Enable SVID
+ register "ChvSvidConfig" = "1"
+ register "PcdEmmcMode" = "PCH_PCI_MODE"
+ register "PcdUsb3ClkSsc" = "1"
+ register "PcdDispClkSsc" = "1"
+ register "PcdSataClkSsc" = "1"
+ register "PcdEnableSata" = "0" # Disable SATA
+ register "Usb2Port0PerPortPeTxiSet" = "7"
+ register "Usb2Port0PerPortTxiSet" = "5"
+ register "Usb2Port0IUsbTxEmphasisEn" = "2"
+ register "Usb2Port0PerPortTxPeHalf" = "1"
+ register "Usb2Port1PerPortPeTxiSet" = "7"
+ register "Usb2Port1PerPortTxiSet" = "3"
+ register "Usb2Port1IUsbTxEmphasisEn" = "2"
+ register "Usb2Port1PerPortTxPeHalf" = "1"
+ register "Usb2Port2PerPortPeTxiSet" = "7"
+ register "Usb2Port2PerPortTxiSet" = "3"
+ register "Usb2Port2IUsbTxEmphasisEn" = "2"
+ register "Usb2Port2PerPortTxPeHalf" = "1"
+ register "Usb2Port3PerPortPeTxiSet" = "7"
+ register "Usb2Port3PerPortTxiSet" = "3"
+ register "Usb2Port3IUsbTxEmphasisEn" = "2"
+ register "Usb2Port3PerPortTxPeHalf" = "1"
+ register "Usb2Port4PerPortPeTxiSet" = "7"
+ register "Usb2Port4PerPortTxiSet" = "3"
+ register "Usb2Port4IUsbTxEmphasisEn" = "2"
+ register "Usb2Port4PerPortTxPeHalf" = "1"
+ register "Usb3Lane0Ow2tapgen2deemph3p5" = "0x3a"
+ register "Usb3Lane1Ow2tapgen2deemph3p5" = "0x64"
+ register "Usb3Lane2Ow2tapgen2deemph3p5" = "0x64"
+ register "Usb3Lane3Ow2tapgen2deemph3p5" = "0x3a"
+ register "PcdSataInterfaceSpeed" = "3"
+ register "PcdPchSsicEnable" = "1"
+ register "PcdRtcLock" = "0" # Disable RTC access locking to NVRAM
+ register "PMIC_I2CBus" = "0"
+ register "ISPEnable" = "0" # Disable IUNIT
+ register "ISPPciDevConfig" = "3"
+ register "PcdSdDetectChk" = "0" # Disable SD card detect
+ register "DptfDisable" = "1"
+
+ # LPE audio codec settings
+ register "lpe_codec_clk_src" = "LPE_CLK_SRC_XTAL" # 19.2MHz clock
+
+ # Enable devices in PCI mode
+ register "lpss_acpi_mode" = "0"
+ register "emmc_acpi_mode" = "0"
+ register "sd_acpi_mode" = "0"
+ register "lpe_acpi_mode" = "0"
+
+ # Disable SLP_X stretching after SUS power well fail.
+ register "disable_slp_x_stretch_sus_fail" = "1"
+
+ # Allow PCIe devices to wake system from suspend
+ register "pcie_wake_enable" = "1"
+
+ # CPLD requires continuous mode
+ register "serirq_mode" = "SERIRQ_CONTINUOUS"
+
+ device cpu_cluster 0 on
+ device lapic 0 on end
+ end
+
+ device domain 0 on
+ device pci 00.0 on end # 8086 2280 - SoC router
+ device pci 02.0 on end # 8086 22B1 - GFX
+ device pci 0b.0 off end # 8086 22DC - PUNIT/DPTF
+ device pci 10.0 on end # 8086 2294 - MMC Port
+ device pci 12.0 on end # 8086 0F16 - SD Port
+ device pci 13.0 off end # 8086 22a3 - SATA Port
+ device pci 14.0 on end # 8086 22b5 - USB XHCI - Only 1 USB controller at a time
+ device pci 18.0 off end # 8086 22c0 - SIO - DMA
+ device pci 18.1 off end # 8086 22c1 - I2C Port 1
+ device pci 18.2 off end # 8086 22c2 - I2C Port 2
+ device pci 18.3 off end # 8086 22c3 - I2C Port 3
+ device pci 18.4 off end # 8086 22c4 - I2C Port 4
+ device pci 18.5 off end # 8086 22c5 - I2C Port 5
+ device pci 18.6 off end # 8086 22c6 - I2C Port 6
+ device pci 18.7 off end # 8086 22c7 - I2C Port 7
+ device pci 1a.0 on end # 8086 2298 - Trusted Execution Engine
+ device pci 1b.0 on end # 8086 2284 - HD Audio
+ device pci 1c.0 on end # 8086 0000 - PCIe Root Port 1
+ device pci 1c.1 off end # 8086 0000 - PCIe Root Port 2
+ device pci 1c.2 off end # 8086 0000 - PCIe Root Port 3
+ device pci 1c.3 on end # 8086 0000 - PCIe Root Port 4
+ device pci 1e.0 off end # 8086 2286 - SIO - DMA
+ device pci 1e.3 off end # 8086 228a - HSUART 1
+ device pci 1e.4 off end # 8086 228c - HSUART 2
+ device pci 1f.0 on # 8086 229c - LPC bridge
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+ end # LPC Bridge
+ device pci 1f.3 on end # 8086 2292 - SMBus 0
+ end
+end