diff options
Diffstat (limited to 'src/mainboard/embeddedplanet/ep405pc/ep405pc.cfg')
| -rwxr-xr-x | src/mainboard/embeddedplanet/ep405pc/ep405pc.cfg | 89 |
1 files changed, 0 insertions, 89 deletions
diff --git a/src/mainboard/embeddedplanet/ep405pc/ep405pc.cfg b/src/mainboard/embeddedplanet/ep405pc/ep405pc.cfg deleted file mode 100755 index 305245d751..0000000000 --- a/src/mainboard/embeddedplanet/ep405pc/ep405pc.cfg +++ /dev/null @@ -1,89 +0,0 @@ -; bdiGDB configuration file for the Embedded Planet EP405PC -; --------------------------------------------------------- -; -[INIT] -; init core register -WSPR 954 0x00000000 ;DCWR: Disable data cache write-thru -WSPR 1018 0x00000000 ;DCCR: Disable data cache -WSPR 1019 0x00000000 ;ICCR: Disable instruction cache -WSPR 981 0x00000000 ;EVPR: Exception Vector Table @0x00000000 - -; Setup SDRAM Controller -WDCR 16 0x00000080 ;Select SDRAM0_TR -WDCR 17 0x010E8016 ;TR: SDRAM Timing Register -WDCR 16 0x00000040 ;Select SDRAM0_B0CR -WDCR 17 0x00084001 ;Select bank 0 -WDCR 16 0x00000030 ;Select SDRAM0_RTR -WDCR 17 0x08080000 ;RTR: Refresh Timing Register -WDCR 16 0x00000094 ;Select SDRAM0_ECCCFG -WDCR 17 0x00000000 ;ECC: Disabled -WDCR 16 0x00000034 ;Select SDRAM0_PMIT -WDCR 17 0x0F000000 ;PMIT: Power Management Idle Timer -DELAY 1 ;Wait for SDRAM powerup -WDCR 16 0x00000020 ;Select SDRAM0_CFG -WDCR 17 0x80C00000 ;CFG: Enable - -; MMU -WM32 0xf0 0x00000000 ;invalidate page table base - -; EBC -WDCR 0x12 0x00000004 ;Select EBC0_B4CR -WDCR 0x13 0xF4058000 ;Set NVRTC/BCSR -WDCR 0x12 0x00000014 ;Select EBC0_B4AP -WDCR 0x13 0x04050000 ;Set NVRTC/BCSR timing -WM8 0xF4000003 0x20 ;Enable UART0 -WM8 0xF4000009 0x07 ;LED -DELAY 500 -WM8 0xF4000009 0x0b ;LED -DELAY 500 -WM8 0xF4000009 0x0d ;LED -DELAY 500 -WM8 0xF4000009 0x0e ;LED -DELAY 500 - -[TARGET] -JTAGCLOCK 0 ;use 16 MHz JTAG clock -CPUTYPE 405 ;the used target CPU type -BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT) -;WAKEUP 3000 ;wakeup time after reset -BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint -STEPMODE JTAG ;JTAG or HWBP, HWPB uses one or two hardware breakpoints -VECTOR CATCH ;catch unhandled exceptions -MMU XLAT 0xC0000000 ;enable virtual address mode -PTBASE 0x000000f0 ;address where kernel/user stores pointer to page table -SIO 2002 9600 ;TCP port for serial IO -;SIO 2002 115200 ;TCP port for serial IO - -;REGLIST SPR ;select register to transfer to GDB -;REGLIST ALL ;select register to transfer to GDB -;SCANPRED 2 2 ;JTAG devices connected before PPC400 -;SCANSUCC 3 3 ;JTAG devices connected after PPC400 - -[HOST] -IP 10.0.1.2 -FORMAT ELF -FILE coreboot.elf -;START 0x200000 -LOAD MANUAL ;load code MANUAL or AUTO after reset -DEBUGPORT 2001 -DUMP dump.bin ;Linux: dump.bin must already exist and public writable - -[FLASH] -WORKSPACE 0x00004000 ;workspace in target RAM for fast programming algorithm -CHIPTYPE AM29BX16 ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16) -CHIPSIZE 0x400000 ;The size of one flash chip in bytes (e.g. AM29F040 = 0x80000) -BUSWIDTH 16 ;The width of the flash memory bus in bits (8 | 16 | 32) -ERASE 0xFFF80000 ;erase sector 0 of flash in U7 (AM29F040) -ERASE 0xFFF90000 ;erase sector 1 of flash -ERASE 0xFFFA0000 ;erase sector 2 of flash -ERASE 0xFFFB0000 ;erase sector 3 of flash -ERASE 0xFFFC0000 ;erase sector 4 of flash -ERASE 0xFFFD0000 ;erase sector 5 of flash -ERASE 0xFFFE0000 ;erase sector 6 of flash -ERASE 0xFFFF0000 ;erase sector 7 of flash - -[REGS] -IDCR1 0x010 0x011 ;MEMCFGADR and MEMCFGDATA -IDCR2 0x012 0x013 ;EBCCFGADR and EBCCFGDATA -IDCR3 0x014 0x015 ;KIAR and KIDR -FILE reg405gp.def |