diff options
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r-- | src/mainboard/asus/p2b/devicetree.cb | 6 | ||||
-rw-r--r-- | src/mainboard/asus/p2b/variants/p2b-d/overridetree.cb | 6 | ||||
-rw-r--r-- | src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb | 6 |
3 files changed, 1 insertions, 17 deletions
diff --git a/src/mainboard/asus/p2b/devicetree.cb b/src/mainboard/asus/p2b/devicetree.cb index 7ee69e41a2..a650552915 100644 --- a/src/mainboard/asus/p2b/devicetree.cb +++ b/src/mainboard/asus/p2b/devicetree.cb @@ -1,9 +1,5 @@ chip northbridge/intel/i440bx # Northbridge - device cpu_cluster 0 on # APIC cluster - chip cpu/intel/slot_1 # CPU - device lapic 0 on end # APIC - end - end + device cpu_cluster 0 on end # APIC cluster device domain 0 on # PCI domain device pci 0.0 on end # Host bridge device pci 1.0 on end # PCI/AGP bridge diff --git a/src/mainboard/asus/p2b/variants/p2b-d/overridetree.cb b/src/mainboard/asus/p2b/variants/p2b-d/overridetree.cb index ce36ce60d0..ed6224fbd7 100644 --- a/src/mainboard/asus/p2b/variants/p2b-d/overridetree.cb +++ b/src/mainboard/asus/p2b/variants/p2b-d/overridetree.cb @@ -1,11 +1,5 @@ chip northbridge/intel/i440bx # Northbridge device cpu_cluster 0 on # (L)APIC cluster - chip cpu/intel/slot_1 # CPU socket 0 - device lapic 0 on end # Local APIC of CPU 0 - end - chip cpu/intel/slot_1 # CPU socket 1 - device lapic 1 on end # Local APIC of CPU 1 - end end device domain 0 on # PCI domain chip southbridge/intel/i82371eb # Southbridge diff --git a/src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb b/src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb index b261a3514f..adcce28057 100644 --- a/src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb +++ b/src/mainboard/asus/p2b/variants/p2b-ds/overridetree.cb @@ -1,11 +1,5 @@ chip northbridge/intel/i440bx # Northbridge device cpu_cluster 0 on # (L)APIC cluster - chip cpu/intel/slot_1 # CPU socket 0 - device lapic 0 on end # Local APIC of CPU 0 - end - chip cpu/intel/slot_1 # CPU socket 1 - device lapic 1 on end # Local APIC of CPU 1 - end end device domain 0 on # PCI domain chip southbridge/intel/i82371eb # Southbridge |