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-rw-r--r--src/mainboard/asus/p2b-d/romstage.c4
-rw-r--r--src/mainboard/asus/p2b-ds/romstage.c4
-rw-r--r--src/mainboard/asus/p2b-f/romstage.c4
-rw-r--r--src/mainboard/asus/p2b-ls/romstage.c4
-rw-r--r--src/mainboard/asus/p2b/romstage.c4
-rw-r--r--src/mainboard/asus/p3b-f/romstage.c4
6 files changed, 0 insertions, 24 deletions
diff --git a/src/mainboard/asus/p2b-d/romstage.c b/src/mainboard/asus/p2b-d/romstage.c
index 1264dd02cb..2fc26aba16 100644
--- a/src/mainboard/asus/p2b-d/romstage.c
+++ b/src/mainboard/asus/p2b-d/romstage.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
-#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"
@@ -56,9 +55,6 @@ void main(unsigned long bist)
console_init();
report_bist_failure(bist);
- /* Enable access to the full ROM chip, needed very early by CBFS. */
- i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */
-
enable_smbus();
dump_spd_registers();
sdram_set_registers();
diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c
index 2bb1a46bbd..002ff93ea9 100644
--- a/src/mainboard/asus/p2b-ds/romstage.c
+++ b/src/mainboard/asus/p2b-ds/romstage.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
-#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"
@@ -56,9 +55,6 @@ void main(unsigned long bist)
console_init();
report_bist_failure(bist);
- /* Enable access to the full ROM chip, needed very early by CBFS. */
- i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */
-
enable_smbus();
dump_spd_registers();
sdram_set_registers();
diff --git a/src/mainboard/asus/p2b-f/romstage.c b/src/mainboard/asus/p2b-f/romstage.c
index baf2db42c3..40277c459f 100644
--- a/src/mainboard/asus/p2b-f/romstage.c
+++ b/src/mainboard/asus/p2b-f/romstage.c
@@ -26,7 +26,6 @@
#include <arch/hlt.h>
#include <stdlib.h>
#include <console/console.h>
-#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"
@@ -56,9 +55,6 @@ void main(unsigned long bist)
console_init();
report_bist_failure(bist);
- /* Enable access to the full ROM chip, needed very early by CBFS. */
- i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */
-
enable_smbus();
dump_spd_registers();
sdram_set_registers();
diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/romstage.c
index 0b653a4a6b..a1018fbaa8 100644
--- a/src/mainboard/asus/p2b-ls/romstage.c
+++ b/src/mainboard/asus/p2b-ls/romstage.c
@@ -26,7 +26,6 @@
#include <arch/hlt.h>
#include <stdlib.h>
#include <console/console.h>
-#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"
@@ -55,9 +54,6 @@ void main(unsigned long bist)
console_init();
report_bist_failure(bist);
- /* Enable access to the full ROM chip, needed very early by CBFS. */
- i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge at 00:04.0. */
-
enable_smbus();
dump_spd_registers();
sdram_set_registers();
diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/romstage.c
index e3a48b3b61..b32f10b102 100644
--- a/src/mainboard/asus/p2b/romstage.c
+++ b/src/mainboard/asus/p2b/romstage.c
@@ -26,7 +26,6 @@
#include <arch/hlt.h>
#include <stdlib.h>
#include <console/console.h>
-#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "northbridge/intel/i440bx/raminit.h"
#include "lib/debug.c"
@@ -53,9 +52,6 @@ void main(unsigned long bist)
console_init();
report_bist_failure(bist);
- /* Enable access to the full ROM chip, needed very early by CBFS. */
- i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge at 00:04.0. */
-
enable_smbus();
dump_spd_registers();
sdram_set_registers();
diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c
index 31b401ac96..8d8c0b39d8 100644
--- a/src/mainboard/asus/p3b-f/romstage.c
+++ b/src/mainboard/asus/p3b-f/romstage.c
@@ -26,7 +26,6 @@
#include <arch/hlt.h>
#include <stdlib.h>
#include <console/console.h>
-#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
#include "southbridge/intel/i82371eb/i82371eb_early_pm.c"
#include "northbridge/intel/i440bx/raminit.h"
@@ -88,9 +87,6 @@ void main(unsigned long bist)
console_init();
report_bist_failure(bist);
- /* Enable access to the full ROM chip, needed very early by CBFS. */
- i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */
-
enable_smbus();
enable_pm();