diff options
Diffstat (limited to 'src/mainboard/asrock/imb-a180/bootblock.c')
| -rw-r--r-- | src/mainboard/asrock/imb-a180/bootblock.c | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/src/mainboard/asrock/imb-a180/bootblock.c b/src/mainboard/asrock/imb-a180/bootblock.c index f6bd5c40de..eb5641ff5e 100644 --- a/src/mainboard/asrock/imb-a180/bootblock.c +++ b/src/mainboard/asrock/imb-a180/bootblock.c @@ -21,23 +21,20 @@ void bootblock_mainboard_early_init(void) { - volatile u32 *addr32; - u32 t32; + u32 reg32; /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ pm_write8(0xea, 0x1); /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */ - addr32 = (u32 *)0xfed80e28; - t32 = *addr32; - t32 &= 0xfff8ffff; - *addr32 = t32; + reg32 = misc_read32(0x28); + reg32 &= 0xfff8ffff; + misc_write32(0x28, reg32); /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */ - addr32 = (u32 *)0xfed80e40; - t32 = *addr32; - t32 &= 0xffffbffb; - *addr32 = t32; + reg32 = misc_read32(0x40); + reg32 &= 0xffffbffb; + misc_write32(0x40, reg32); /* w83627uhg has a default clk of 48MHz, p.9 of data-sheet */ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |