diff options
Diffstat (limited to 'src/mainboard/apple/macbook21/acpi')
-rw-r--r-- | src/mainboard/apple/macbook21/acpi/ec.asl | 0 | ||||
-rw-r--r-- | src/mainboard/apple/macbook21/acpi/gpe.asl | 0 | ||||
-rw-r--r-- | src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl | 71 | ||||
-rw-r--r-- | src/mainboard/apple/macbook21/acpi/ich7_pci_irqs.asl | 74 | ||||
-rw-r--r-- | src/mainboard/apple/macbook21/acpi/mainboard.asl | 0 | ||||
-rw-r--r-- | src/mainboard/apple/macbook21/acpi/platform.asl | 192 | ||||
-rw-r--r-- | src/mainboard/apple/macbook21/acpi/superio.asl | 0 | ||||
-rw-r--r-- | src/mainboard/apple/macbook21/acpi/video.asl | 53 |
8 files changed, 390 insertions, 0 deletions
diff --git a/src/mainboard/apple/macbook21/acpi/ec.asl b/src/mainboard/apple/macbook21/acpi/ec.asl new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/src/mainboard/apple/macbook21/acpi/ec.asl diff --git a/src/mainboard/apple/macbook21/acpi/gpe.asl b/src/mainboard/apple/macbook21/acpi/gpe.asl new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/src/mainboard/apple/macbook21/acpi/gpe.asl diff --git a/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl b/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl new file mode 100644 index 0000000000..6047def7ef --- /dev/null +++ b/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl @@ -0,0 +1,71 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +/* This is board specific information: IRQ routing for the + * i945 + */ + + +// PCI Interrupt Routing +Method(_PRT) +{ + If (PICM) { + Return (Package() { + Package() { 0x0001FFFF, 0, 0, 0x10 }, + Package() { 0x0002FFFF, 0, 0, 0x10 }, + Package() { 0x0007FFFF, 0, 0, 0x10 }, + Package() { 0x001BFFFF, 0, 0, 0x16 }, + Package() { 0x001CFFFF, 0, 0, 0x11 }, + Package() { 0x001CFFFF, 1, 0, 0x10 }, + Package() { 0x001CFFFF, 2, 0, 0x12 }, + Package() { 0x001CFFFF, 3, 0, 0x13 }, + Package() { 0x001DFFFF, 0, 0, 0x15 }, + Package() { 0x001DFFFF, 1, 0, 0x13 }, + Package() { 0x001DFFFF, 2, 0, 0x12 }, + Package() { 0x001DFFFF, 3, 0, 0x10 }, + Package() { 0x001EFFFF, 0, 0, 0x16 }, + Package() { 0x001EFFFF, 1, 0, 0x14 }, + Package() { 0x001FFFFF, 0, 0, 0x12 }, + Package() { 0x001FFFFF, 1, 0, 0x13 }, + Package() { 0x001FFFFF, 3, 0, 0x10 } + }) + } Else { + Return (Package() { + Package() { 0x0001FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + Package() { 0x0002FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + Package() { 0x0007FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + Package() { 0x001BFFFF, 0, \_SB.PCI0.LPCB.LNKG, 0 }, + Package() { 0x001CFFFF, 0, \_SB.PCI0.LPCB.LNKB, 0 }, + Package() { 0x001CFFFF, 1, \_SB.PCI0.LPCB.LNKA, 0 }, + Package() { 0x001CFFFF, 2, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x001CFFFF, 3, \_SB.PCI0.LPCB.LNKD, 0 }, + Package() { 0x001DFFFF, 0, \_SB.PCI0.LPCB.LNKH, 0 }, + Package() { 0x001DFFFF, 1, \_SB.PCI0.LPCB.LNKD, 0 }, + Package() { 0x001DFFFF, 2, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x001DFFFF, 3, \_SB.PCI0.LPCB.LNKA, 0 }, + Package() { 0x001EFFFF, 0, \_SB.PCI0.LPCB.LNKG, 0 }, + Package() { 0x001EFFFF, 1, \_SB.PCI0.LPCB.LNKE, 0 }, + Package() { 0x001FFFFF, 0, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x001FFFFF, 1, \_SB.PCI0.LPCB.LNKD, 0 }, + Package() { 0x001FFFFF, 3, \_SB.PCI0.LPCB.LNKA, 0 } + }) + } +} diff --git a/src/mainboard/apple/macbook21/acpi/ich7_pci_irqs.asl b/src/mainboard/apple/macbook21/acpi/ich7_pci_irqs.asl new file mode 100644 index 0000000000..53549019bc --- /dev/null +++ b/src/mainboard/apple/macbook21/acpi/ich7_pci_irqs.asl @@ -0,0 +1,74 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +/* This is board specific information: IRQ routing for the + * 0:1e.0 PCI bridge of the ICH7 + */ + +If (PICM) { + Return (Package() { + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x15 }, + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x16 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x17 }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x14 }, + Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x16 }, + Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x15 }, + Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x14 }, + Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x17 }, + Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x12 }, + Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x13 }, + Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x11 }, + Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x10 }, + Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x13 }, + Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x12 }, + Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x15 }, + Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x16 }, + Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x11 }, + Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x14 }, + Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x16 }, + Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x15 }, + Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x14 } + }) + } Else { + Return (Package() { + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LPCB.LNKF, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LPCB.LNKG, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LPCB.LNKH, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LPCB.LNKE, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKG, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LPCB.LNKF, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LPCB.LNKE, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LPCB.LNKH, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LPCB.LNKC, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LPCB.LNKD, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LPCB.LNKB, 0x00 }, + Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LPCB.LNKD, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LPCB.LNKC, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LPCB.LNKF, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LPCB.LNKG, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LPCB.LNKB, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LPCB.LNKE, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LPCB.LNKG, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LPCB.LNKF, 0x00 }, + Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LPCB.LNKE, 0x00 } + }) +} diff --git a/src/mainboard/apple/macbook21/acpi/mainboard.asl b/src/mainboard/apple/macbook21/acpi/mainboard.asl new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/src/mainboard/apple/macbook21/acpi/mainboard.asl diff --git a/src/mainboard/apple/macbook21/acpi/platform.asl b/src/mainboard/apple/macbook21/acpi/platform.asl new file mode 100644 index 0000000000..1c6ac6e6c2 --- /dev/null +++ b/src/mainboard/apple/macbook21/acpi/platform.asl @@ -0,0 +1,192 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +/* These come from the dynamically created CPU SSDT */ +External(PDC0) +External(PDC1) + +/* The APM port can be used for generating software SMIs */ + +OperationRegion (APMP, SystemIO, 0xb2, 2) +Field (APMP, ByteAcc, NoLock, Preserve) +{ + APMC, 8, // APM command + APMS, 8 // APM status +} + +/* Port 80 POST */ + +OperationRegion (POST, SystemIO, 0x80, 1) +Field (POST, ByteAcc, Lock, Preserve) +{ + DBG0, 8 +} + +/* SMI I/O Trap */ +Method(TRAP, 1, Serialized) +{ + Store (Arg0, SMIF) // SMI Function + Store (0, TRP0) // Generate trap + Return (SMIF) // Return value of SMI handler +} + +/* The _PIC method is called by the OS to choose between interrupt + * routing via the i8259 interrupt controller or the APIC. + * + * _PIC is called with a parameter of 0 for i8259 configuration and + * with a parameter of 1 for Local Apic/IOAPIC configuration. + */ + +Method(_PIC, 1) +{ + // Remember the OS' IRQ routing choice. + Store(Arg0, PICM) +} + +/* The _WAK method is called on system wakeup */ + +Method(_WAK,1) +{ + // CPU specific part + + // Notify PCI Express slots in case a card + // was inserted while a sleep state was active. + + // Are we going to S3? + If (LEqual(Arg0, 3)) { + // .. + } + + // Are we going to S4? + If (LEqual(Arg0, 4)) { + // .. + } + + // TODO: Windows XP SP2 P-State restore + + Return(Package(){0,0}) +} + +// Power notification + +External (\_PR_.CPU0, DeviceObj) +External (\_PR_.CPU1, DeviceObj) + +Method (PNOT) +{ + If (MPEN) { + If(And(PDC0, 0x08)) { + Notify (\_PR_.CPU0, 0x80) // _PPC + + If (And(PDC0, 0x10)) { + Sleep(100) + Notify(\_PR_.CPU0, 0x81) // _CST + } + } + + If(And(PDC1, 0x08)) { + Notify (\_PR_.CPU1, 0x80) // _PPC + If (And(PDC1, 0x10)) { + Sleep(100) + Notify(\_PR_.CPU1, 0x81) // _CST + } + } + + } Else { // UP + Notify (\_PR_.CPU0, 0x80) + Sleep(0x64) + Notify(\_PR_.CPU0, 0x81) + } +} + +/* System Bus */ + +Scope(\_SB) +{ + /* This method is placed on the top level, so we can make sure it's the + * first executed _INI method. + */ + Method(_INI, 0) + { + /* The DTS data in NVS is probably not up to date. + * Update temperature values and make sure AP thermal + * interrupts can happen + */ + + // TRAP(71) // TODO + + /* Determine the Operating System and save the value in OSYS. + * We have to do this in order to be able to work around + * certain windows bugs. + * + * OSYS value | Operating System + * -----------+------------------ + * 2000 | Windows 2000 + * 2001 | Windows XP(+SP1) + * 2002 | Windows XP SP2 + * 2006 | Windows Vista + * ???? | Windows 7 + */ + + /* Let's assume we're running at least Windows 2000 */ + Store (2000, OSYS) + + If (CondRefOf(_OSI, Local0)) { + /* Linux answers _OSI with "True" for a couple of + * Windows version queries. But unlike Windows it + * needs a Video repost, so let's determine whether + * we're running Linux. + */ + + If (_OSI("Linux")) { + Store (1, LINX) + } + + If (_OSI("Windows 2001")) { + Store (2001, OSYS) + } + + If (_OSI("Windows 2001 SP1")) { + Store (2001, OSYS) + } + + If (_OSI("Windows 2001 SP2")) { + Store (2002, OSYS) + } + + If (_OSI("Windows 2006")) { + Store (2006, OSYS) + } + } + + /* And the OS workarounds start right after we know what we're + * running: Windows XP SP1 needs to have C-State coordination + * enabled in SMM. + */ + If (LAnd(LEqual(OSYS, 2001), MPEN)) { + // TRAP(61) // TODO + } + + /* SMM power state and C4-on-C3 settings need to be updated */ + // TRAP(43) // TODO + } +} + diff --git a/src/mainboard/apple/macbook21/acpi/superio.asl b/src/mainboard/apple/macbook21/acpi/superio.asl new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/src/mainboard/apple/macbook21/acpi/superio.asl diff --git a/src/mainboard/apple/macbook21/acpi/video.asl b/src/mainboard/apple/macbook21/acpi/video.asl new file mode 100644 index 0000000000..50a0947c2d --- /dev/null +++ b/src/mainboard/apple/macbook21/acpi/video.asl @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (c) 2011 Sven Schnelle <svens@stackframe.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include "smi.h" + +Device (DSPC) +{ + Name (_ADR, 0x00020001) + OperationRegion (DSPC, PCI_Config, 0x00, 0x100) + Field (DSPC, ByteAcc, NoLock, Preserve) + { + Offset (0xf4), + BRTC, 8 + } + + Method(BRTD, 0, NotSerialized) + { + Store(BRTC, Local0) + if (LGreater (Local0, 15)) + { + Subtract(Local0, 16, Local0) + Store(Local0, BRTC) + } + } + + Method(BRTU, 0, NotSerialized) + { + Store (BRTC, Local0) + if (LLess(Local0, 0xff)) + { + Add (Local0, 16, Local0) + Store(Local0, BRTC) + } + } +} |