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-rw-r--r--src/mainboard/amd/mahogany/romstage.c12
-rw-r--r--src/mainboard/amd/mahogany_fam10/romstage.c10
-rw-r--r--src/mainboard/amd/tilapia_fam10/dsdt.asl21
-rw-r--r--src/mainboard/amd/tilapia_fam10/romstage.c10
4 files changed, 37 insertions, 16 deletions
diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c
index 4f98e99a9b..41fa2071ae 100644
--- a/src/mainboard/amd/mahogany/romstage.c
+++ b/src/mainboard/amd/mahogany/romstage.c
@@ -80,21 +80,21 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
- /* sb700_lpc_port80(); */
- sb700_pci_port80();
+ /* sb7xx_51xx_lpc_port80(); */
+ sb7xx_51xx_pci_port80();
}
if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
enable_rs780_dev8();
- sb700_lpc_init();
+ sb7xx_51xx_lpc_init();
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
uart_init();
#if CONFIG_USBDEBUG
- sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+ sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
early_usbdebug_init();
#endif
@@ -119,7 +119,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* run _early_setup before soft-reset. */
rs780_early_setup();
- sb700_early_setup();
+ sb7xx_51xx_early_setup();
/* Check to see if processor is capable of changing FIDVID */
/* otherwise it will throw a GP# when reading FIDVID_STATUS */
@@ -159,7 +159,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
rs780_before_pci_init();
- sb700_before_pci_init();
+ sb7xx_51xx_before_pci_init();
post_cache_as_ram();
}
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index 40e8a170b5..7bc96c8f43 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -88,7 +88,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* mov bsp to bus 0xff when > 8 nodes */
set_bsp_node_CHtExtNodeCfgEn();
enumerate_ht_chain();
- sb700_pci_port80();
+ sb7xx_51xx_pci_port80();
}
post_code(0x30);
@@ -101,13 +101,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x32);
enable_rs780_dev8();
- sb700_lpc_init();
+ sb7xx_51xx_lpc_init();
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
uart_init();
#if CONFIG_USBDEBUG
- sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+ sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
early_usbdebug_init();
#endif
@@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* run _early_setup before soft-reset. */
rs780_early_setup();
- sb700_early_setup();
+ sb7xx_51xx_early_setup();
#if CONFIG_SET_FIDVID
msr = rdmsr(0xc0010071);
@@ -225,7 +225,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// die("After MCT init before CAR disabled.");
rs780_before_pci_init();
- sb700_before_pci_init();
+ sb7xx_51xx_before_pci_init();
post_code(0x42);
printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
diff --git a/src/mainboard/amd/tilapia_fam10/dsdt.asl b/src/mainboard/amd/tilapia_fam10/dsdt.asl
index 3170a0b89c..93724e351d 100644
--- a/src/mainboard/amd/tilapia_fam10/dsdt.asl
+++ b/src/mainboard/amd/tilapia_fam10/dsdt.asl
@@ -1544,6 +1544,7 @@ DefinitionBlock (
0xF300 /* length */
)
+#if 0
Memory32Fixed(READWRITE, 0, 0xA0000, BSMM)
Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */
Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1) /* Assume C0000-E0000 empty */
@@ -1585,12 +1586,16 @@ DefinitionBlock (
,,
PEBM
)
+#endif
+ /* memory space for PCI BARs below 4GB */
+ Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO)
}) /* End Name(_SB.PCI0.CRES) */
Method(_CRS, 0) {
/* DBGO("\\_SB\\PCI0\\_CRS\n") */
+#if 0
CreateDWordField(CRES, ^EMM1._BAS, EM1B)
CreateDWordField(CRES, ^EMM1._LEN, EM1L)
CreateDWordField(CRES, ^DMLO._BAS, DMLB)
@@ -1628,6 +1633,22 @@ DefinitionBlock (
ShiftLeft(PBAD,16,EBMB) /* Reserve the "BIOS" space */
Store(PBLN,EBML)
}
+#endif
+
+ CreateDWordField(CRES, ^MMIO._BAS, MM1B)
+ CreateDWordField(CRES, ^MMIO._LEN, MM1L)
+ /*
+ * Declare memory between TOM1 and 4GB as available
+ * for PCI MMIO.
+ * Use ShiftLeft to avoid 64bit constant (for XP).
+ * This will work even if the OS does 32bit arithmetic, as
+ * 32bit (0x00000000 - TOM1) will wrap and give the same
+ * result as 64bit (0x100000000 - TOM1).
+ */
+ Store(TOM1, MM1B)
+ ShiftLeft(0x10000000, 4, Local0)
+ Subtract(Local0, TOM1, Local0)
+ Store(Local0, MM1L)
Return(CRES) /* note to change the Name buffer */
} /* end of Method(_SB.PCI0._CRS) */
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index ea8ec41fdd..fc9d611bba 100644
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -87,7 +87,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* mov bsp to bus 0xff when > 8 nodes */
set_bsp_node_CHtExtNodeCfgEn();
enumerate_ht_chain();
- sb700_pci_port80();
+ sb7xx_51xx_pci_port80();
}
post_code(0x30);
@@ -100,13 +100,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x32);
enable_rs780_dev8();
- sb700_lpc_init();
+ sb7xx_51xx_lpc_init();
it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
uart_init();
#if CONFIG_USBDEBUG
- sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+ sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
early_usbdebug_init();
#endif
@@ -166,7 +166,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* run _early_setup before soft-reset. */
rs780_early_setup();
- sb700_early_setup();
+ sb7xx_51xx_early_setup();
#if CONFIG_SET_FIDVID
msr = rdmsr(0xc0010071);
@@ -224,7 +224,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// die("After MCT init before CAR disabled.");
rs780_before_pci_init();
- sb700_before_pci_init();
+ sb7xx_51xx_before_pci_init();
post_code(0x42);
printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 15:46:26 +0000