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-rw-r--r--src/mainboard/amd/chausie/Kconfig21
-rw-r--r--src/mainboard/amd/chausie/Makefile.inc13
-rw-r--r--src/mainboard/amd/chausie/board.fmd2
3 files changed, 32 insertions, 4 deletions
diff --git a/src/mainboard/amd/chausie/Kconfig b/src/mainboard/amd/chausie/Kconfig
index dc6e090bce..9c4dbb5820 100644
--- a/src/mainboard/amd/chausie/Kconfig
+++ b/src/mainboard/amd/chausie/Kconfig
@@ -24,7 +24,6 @@ config MAINBOARD_PART_NUMBER
config AMD_FWM_POSITION_INDEX
int
default 3 if CHROMEOS
- default 4
help
TODO: might need to be adapted for better placement of files in cbfs
@@ -32,14 +31,32 @@ config CHAUSIE_HAVE_MCHP_FW
bool "Have Microchip EC firmware?"
default n
+config CHAUSIE_MCHP_SIG_FILE
+ string
+ depends on CHAUSIE_HAVE_MCHP_FW
+ default "3rdparty/blobs/mainboard/amd/chausie/EC_chausie_sig.bin"
+ help
+ The EC sig blob is the first 4kBytes of the firmware image.
+ The first 4 bytes form a pointer (with CRC) to where the EC firmware
+ is located
+
config CHAUSIE_MCHP_FW_FILE
string
depends on CHAUSIE_HAVE_MCHP_FW
default "3rdparty/blobs/mainboard/amd/chausie/EC_chausie.bin"
help
- The EC firmware blob is usually the first 128kByte of the stock
+ The EC firmware blob is at the CHAUSIE_MCHP_FW_OFFSET offset of the
firmware image.
+config CHAUSIE_MCHP_FW_OFFSET
+ hex
+ depends on CHAUSIE_HAVE_MCHP_FW
+ default 0x400000
+ help
+ The EC firmware blob defaults to the 4MByte offset of the firmware
+ image. If this offset needs to change, a new signature block must be
+ generated with the updated offset.
+
config VBOOT
select VBOOT_NO_BOARD_SUPPORT
select VBOOT_SEPARATE_VERSTAGE
diff --git a/src/mainboard/amd/chausie/Makefile.inc b/src/mainboard/amd/chausie/Makefile.inc
index ca267ea227..e4944002f1 100644
--- a/src/mainboard/amd/chausie/Makefile.inc
+++ b/src/mainboard/amd/chausie/Makefile.inc
@@ -14,7 +14,18 @@ ramstage-y += gpio.c
ifeq ($(CONFIG_CHAUSIE_HAVE_MCHP_FW),y)
$(call add_intermediate, add_mchp_fw)
- $(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_CHAUSIE_MCHP_FW_FILE) --fill-upward
+ $(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_CHAUSIE_MCHP_SIG_FILE) --fill-upward
+
+# calculate the absolute position from the config offset
+CHAUSIE_EC_POSITION=$(call int-add, \
+ $(call int-subtract, 0xffffffff \
+ $(CONFIG_ROM_SIZE)) $(CONFIG_CHAUSIE_MCHP_FW_OFFSET) 1)
+
+cbfs-files-y += apu/ecfw
+apu/ecfw-file := $(CONFIG_CHAUSIE_MCHP_FW_FILE)
+apu/ecfw-position := $(CHAUSIE_EC_POSITION)
+apu/ecfw-type := raw
+
else
files_added:: warn_no_mchp
endif # CONFIG_CHAUSIE_HAVE_MCHP_FW
diff --git a/src/mainboard/amd/chausie/board.fmd b/src/mainboard/amd/chausie/board.fmd
index 442d80f341..642d7b2c8f 100644
--- a/src/mainboard/amd/chausie/board.fmd
+++ b/src/mainboard/amd/chausie/board.fmd
@@ -1,6 +1,6 @@
FLASH@0xFF000000 16M {
BIOS {
- EC 128K
+ EC 4K
RW_MRC_CACHE 64K
FMAP 4K
COREBOOT(CBFS)