summaryrefslogtreecommitdiff
path: root/src/mainboard/amd/tilapia_fam10
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/amd/tilapia_fam10')
-rwxr-xr-x[-rw-r--r--]src/mainboard/amd/tilapia_fam10/Kconfig9
-rwxr-xr-x[-rw-r--r--]src/mainboard/amd/tilapia_fam10/mainboard.c7
-rwxr-xr-x[-rw-r--r--]src/mainboard/amd/tilapia_fam10/romstage.c5
3 files changed, 13 insertions, 8 deletions
diff --git a/src/mainboard/amd/tilapia_fam10/Kconfig b/src/mainboard/amd/tilapia_fam10/Kconfig
index b18115b8e9..e9d6081912 100644..100755
--- a/src/mainboard/amd/tilapia_fam10/Kconfig
+++ b/src/mainboard/amd/tilapia_fam10/Kconfig
@@ -83,4 +83,13 @@ config RAMBASE
hex
default 0x200000
+config VGA_BIOS
+ bool
+ default n
+
+config VGA_BIOS_ID
+ string
+ depends on VGA_BIOS
+ default "1002,9615"
+
endif # BOARD_AMD_TILAPIA_FAM10
diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c
index 84ff92884c..357bdac230 100644..100755
--- a/src/mainboard/amd/tilapia_fam10/mainboard.c
+++ b/src/mainboard/amd/tilapia_fam10/mainboard.c
@@ -26,15 +26,12 @@
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
+#include "southbridge/amd/sb700/smbus.h"
#include "chip.h"
#define ADT7461_ADDRESS 0x4C
#define ARA_ADDRESS 0x0C /* Alert Response Address */
-extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
-extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
- u8 val);
-
#define ADT7461_read_byte(address) \
do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address)
#define ARA_read_byte(address) \
@@ -42,8 +39,6 @@ extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
#define ADT7461_write_byte(address, val) \
do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
-#define SMBUS_IO_BASE 0x6000
-
uint64_t uma_memory_base, uma_memory_size;
void set_pcie_dereset(void);
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index 3a85a15f84..48b13be1c7 100644..100755
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -48,14 +48,15 @@
#include <cpu/amd/mtrr.h>
#include "northbridge/amd/amdfam10/setup_resource_map.c"
#include "southbridge/amd/rs780/early_setup.c"
-#include "southbridge/amd/sb700/early_setup.c"
+#include "southbridge/amd/sb700/sb700.h"
+#include "southbridge/amd/sb700/smbus.h"
#include "northbridge/amd/amdfam10/debug.c"
static void activate_spd_rom(const struct mem_controller *ctrl) { }
static int spd_read_byte(u32 device, u32 address)
{
- return smbus_read_byte(device, address);
+ return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
}
#include "northbridge/amd/amdfam10/amdfam10.h"