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-rw-r--r--src/mainboard/amd/olivehill/PlatformGnbPcie.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/amd/olivehill/PlatformGnbPcie.c b/src/mainboard/amd/olivehill/PlatformGnbPcie.c
index 4ae20b6aac..220528b258 100644
--- a/src/mainboard/amd/olivehill/PlatformGnbPcie.c
+++ b/src/mainboard/amd/olivehill/PlatformGnbPcie.c
@@ -29,7 +29,7 @@
static const PCIe_PORT_DESCRIPTOR PortList [] = {
{
- 0, //Descriptor flags !!!IMPORTANT!!! Terminate last element of array
+ 0,
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 3, 3),
PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 5,
HotplugDisabled,
@@ -39,7 +39,7 @@ static const PCIe_PORT_DESCRIPTOR PortList [] = {
},
/* Initialize Port descriptor (PCIe port, Lanes 1, PCI Device Number 2, ...) */
{
- 0, //Descriptor flags !!!IMPORTANT!!! Terminate last element of array
+ 0,
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 2, 2),
PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 4,
HotplugDisabled,
@@ -49,7 +49,7 @@ static const PCIe_PORT_DESCRIPTOR PortList [] = {
},
/* Initialize Port descriptor (PCIe port, Lanes 2, PCI Device Number 2, ...) */
{
- 0, //Descriptor flags !!!IMPORTANT!!! Terminate last element of array
+ 0,
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 1, 1),
PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 3,
HotplugDisabled,
@@ -69,7 +69,7 @@ static const PCIe_PORT_DESCRIPTOR PortList [] = {
},
/* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device Number 4, ...) */
{
- DESCRIPTOR_TERMINATE_LIST, //Descriptor flags !!!IMPORTANT!!! Terminate last element of array
+ DESCRIPTOR_TERMINATE_LIST,
PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 7),
PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 1,
HotplugDisabled,