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-rw-r--r--src/include/cpu/x86/mtrr.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 412330449f..9227710596 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -190,10 +190,6 @@ static inline unsigned int fls(unsigned int x)
*/
#define CACHE_TMP_RAMTOP (16<<20)
-#if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0)
-# error "CONFIG_XIP_ROM_SIZE is not a power of 2"
-#endif
-
/* For ROM caching, generally, try to use the next power of 2. */
#define OPTIMAL_CACHE_ROM_SIZE _ALIGN_UP_POW2(CONFIG_ROM_SIZE)
#define OPTIMAL_CACHE_ROM_BASE _FROM_4G_TOP(OPTIMAL_CACHE_ROM_SIZE)