diff options
Diffstat (limited to 'src/drivers')
| -rw-r--r-- | src/drivers/intel/fsp1_1/Kconfig | 4 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/Kconfig | 4 |
2 files changed, 0 insertions, 8 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig index af6ed422a1..2575577ba4 100644 --- a/src/drivers/intel/fsp1_1/Kconfig +++ b/src/drivers/intel/fsp1_1/Kconfig @@ -86,10 +86,6 @@ config USE_GENERIC_FSP_CAR_INC The chipset can select this to use a generic cache_as_ram.inc file that should be good for all FSP based platforms. -config CHECKLIST_DATA_FILE_LOCATION - string - default "src/vendorcode/intel/fsp/fsp1_1/checklist" - config RESET_ON_INVALID_RAMSTAGE_CACHE bool "Reset the system on S3 wake when ramstage cache invalid." default n diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 28e9e5dcd3..8156d187dc 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -146,10 +146,6 @@ config VERIFY_HOBS Verify that the HOBs required by coreboot are returned by FSP and that the resource HOBs are in the correct order and position. -config CHECKLIST_DATA_FILE_LOCATION - string - default "src/vendorcode/intel/fsp/fsp2_0/checklist" - config RESET_ON_INVALID_RAMSTAGE_CACHE bool "Reset the system on S3 wake when ramstage cache invalid." default n |