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-rw-r--r--src/drivers/intel/fsp1_1/Kconfig4
-rw-r--r--src/drivers/intel/fsp2_0/Kconfig4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index 989c4547f5..93af4f7360 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -82,10 +82,6 @@ config USE_GENERIC_FSP_CAR_INC
The chipset can select this to use a generic cache_as_ram.inc file
that should be good for all FSP based platforms.
-config RESET_ON_INVALID_RAMSTAGE_CACHE
- bool "Reset the system on S3 wake when ramstage cache invalid."
- default n
-
config SKIP_FSP_CAR
def_bool n
help
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 7ce7838642..a8b3ac43a5 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -117,10 +117,6 @@ config FSP_TEMP_RAM_SIZE
stack with coreboot/bootloader.
Sync this value with Platform FSP integration guide recommendation.
-config RESET_ON_INVALID_RAMSTAGE_CACHE
- bool "Reset the system on S3 wake when ramstage cache invalid."
- default n
-
config FSP2_0_USES_TPM_MRC_HASH
bool
depends on TPM1 || TPM2