diff options
Diffstat (limited to 'src/drivers/amd/agesa')
| -rw-r--r-- | src/drivers/amd/agesa/eventlog.c | 22 | ||||
| -rw-r--r-- | src/drivers/amd/agesa/romstage.c | 6 |
2 files changed, 14 insertions, 14 deletions
diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c index 126a2ee1e1..7154c95155 100644 --- a/src/drivers/amd/agesa/eventlog.c +++ b/src/drivers/amd/agesa/eventlog.c @@ -28,69 +28,69 @@ static const struct agesa_mapping entrypoint[] = { .func = AMD_INIT_RESET, .name = "AmdInitReset", .entry_id = TS_AGESA_INIT_RESET_START, - .exit_id = TS_AGESA_INIT_RESET_DONE, + .exit_id = TS_AGESA_INIT_RESET_END, }, { .func = AMD_INIT_EARLY, .name = "AmdInitEarly", .entry_id = TS_AGESA_INIT_EARLY_START, - .exit_id = TS_AGESA_INIT_EARLY_DONE, + .exit_id = TS_AGESA_INIT_EARLY_END, }, { .func = AMD_INIT_POST, .name = "AmdInitPost", .entry_id = TS_AGESA_INIT_POST_START, - .exit_id = TS_AGESA_INIT_POST_DONE, + .exit_id = TS_AGESA_INIT_POST_END, }, { .func = AMD_INIT_RESUME, .name = "AmdInitResume", .entry_id = TS_AGESA_INIT_RESUME_START, - .exit_id = TS_AGESA_INIT_RESUME_DONE, + .exit_id = TS_AGESA_INIT_RESUME_END, }, { .func = AMD_INIT_ENV, .name = "AmdInitEnv", .entry_id = TS_AGESA_INIT_ENV_START, - .exit_id = TS_AGESA_INIT_ENV_DONE, + .exit_id = TS_AGESA_INIT_ENV_END, }, { .func = AMD_INIT_MID, .name = "AmdInitMid", .entry_id = TS_AGESA_INIT_MID_START, - .exit_id = TS_AGESA_INIT_MID_DONE, + .exit_id = TS_AGESA_INIT_MID_END, }, { .func = AMD_INIT_LATE, .name = "AmdInitLate", .entry_id = TS_AGESA_INIT_LATE_START, - .exit_id = TS_AGESA_INIT_LATE_DONE, + .exit_id = TS_AGESA_INIT_LATE_END, }, { .func = AMD_S3LATE_RESTORE, .name = "AmdS3LateRestore", .entry_id = TS_AGESA_S3_LATE_START, - .exit_id = TS_AGESA_S3_LATE_DONE, + .exit_id = TS_AGESA_S3_LATE_END, }, #if !defined(AMD_S3_SAVE_REMOVED) { .func = AMD_S3_SAVE, .name = "AmdS3Save", .entry_id = TS_AGESA_INIT_RTB_START, - .exit_id = TS_AGESA_INIT_RTB_DONE, + .exit_id = TS_AGESA_INIT_RTB_END, }, #endif { .func = AMD_S3FINAL_RESTORE, .name = "AmdS3FinalRestore", .entry_id = TS_AGESA_S3_FINAL_START, - .exit_id = TS_AGESA_S3_FINAL_DONE, + .exit_id = TS_AGESA_S3_FINAL_END, }, { .func = AMD_INIT_RTB, .name = "AmdInitRtb", .entry_id = TS_AGESA_INIT_RTB_START, - .exit_id = TS_AGESA_INIT_RTB_DONE, + .exit_id = TS_AGESA_INIT_RTB_END, }, }; diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 871054b92c..5968f7379f 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -40,7 +40,7 @@ static void romstage_main(void) fill_sysinfo(cb); - timestamp_add_now(TS_START_ROMSTAGE); + timestamp_add_now(TS_ROMSTAGE_START); board_BeforeAgesa(cb); @@ -55,14 +55,14 @@ static void romstage_main(void) agesa_execute_state(cb, AMD_INIT_EARLY); - timestamp_add_now(TS_BEFORE_INITRAM); + timestamp_add_now(TS_INITRAM_START); if (!cb->s3resume) agesa_execute_state(cb, AMD_INIT_POST); else agesa_execute_state(cb, AMD_INIT_RESUME); - timestamp_add_now(TS_AFTER_INITRAM); + timestamp_add_now(TS_INITRAM_END); /* Work around AGESA setting all memory as WB on normal * boot path. |