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-rw-r--r--src/cpu/Kconfig70
-rw-r--r--src/cpu/Makefile.inc12
-rw-r--r--src/cpu/amd/family_10h-family_15h/Kconfig2
-rw-r--r--src/cpu/amd/family_10h-family_15h/Makefile.inc4
-rw-r--r--src/cpu/intel/fsp_model_406dx/Kconfig1
-rw-r--r--src/cpu/intel/microcode/Makefile.inc2
6 files changed, 67 insertions, 24 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index a7cb99e4b3..f98ce6d0eb 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -84,14 +84,43 @@ config USES_MICROCODE_HEADER_FILES
This is selected by a board or chipset to set the default for the
microcode source choice to a list of external microcode headers
+config MICROCODE_BLOB_NOT_IN_BLOB_REPO
+ bool
+ help
+ Selected by platforms that don't maintain microcode updates in the
+ blobs repo yet.
+
+config MICROCODE_BLOB_NOT_HOOKED_UP
+ bool
+ help
+ Selected by platforms that haven't hooked microcode updates up yet.
+
+config MICROCODE_BLOB_UNDISCLOSED
+ bool
+ help
+ Selected by work-in-progress platforms that don't have microcode
+ updates available yet.
+
+config USE_CPU_MICROCODE_CBFS_BINS
+ bool
+ help
+ Automatically selected below to add binary microcode files
+ (`cpu_microcode_bins` in the makefiles) to CBFS.
+
choice
prompt "Include CPU microcode in CBFS" if ARCH_X86
default CPU_MICROCODE_CBFS_EXTERNAL_HEADER if USES_MICROCODE_HEADER_FILES
- default CPU_MICROCODE_CBFS_GENERATE if SUPPORT_CPU_UCODE_IN_CBFS && USE_BLOBS
- default CPU_MICROCODE_CBFS_NONE if !SUPPORT_CPU_UCODE_IN_CBFS
+ default CPU_MICROCODE_CBFS_NONE if MICROCODE_BLOB_NOT_IN_BLOB_REPO || \
+ MICROCODE_BLOB_NOT_HOOKED_UP || \
+ MICROCODE_BLOB_UNDISCLOSED
+ depends on SUPPORT_CPU_UCODE_IN_CBFS
-config CPU_MICROCODE_CBFS_GENERATE
+config CPU_MICROCODE_CBFS_DEFAULT_BINS
bool "Generate from tree"
+ select USE_CPU_MICROCODE_CBFS_BINS
+ depends on !(MICROCODE_BLOB_NOT_IN_BLOB_REPO || \
+ MICROCODE_BLOB_NOT_HOOKED_UP || \
+ MICROCODE_BLOB_UNDISCLOSED)
help
Select this option if you want microcode updates to be assembled when
building coreboot and included in the final image as a separate CBFS
@@ -102,8 +131,27 @@ config CPU_MICROCODE_CBFS_GENERATE
If unsure, select this option.
+config CPU_MICROCODE_CBFS_EXTERNAL_BINS
+ bool "Include external microcode binary"
+ select USE_CPU_MICROCODE_CBFS_BINS
+ depends on !CPU_MICROCODE_MULTIPLE_FILES
+ help
+ Select this option if you want to include external binary files
+ in the CPUs native format. They will be included as a separate
+ file in CBFS.
+
+ A word of caution: only select this option if you are sure the
+ microcode that you have is newer than the microcode shipping with
+ coreboot.
+
+ The microcode file may be removed from the ROM image at a later
+ time with cbfstool, if desired.
+
+ If unsure, and applicable, select "Generate from tree"
+
config CPU_MICROCODE_CBFS_EXTERNAL_HEADER
bool "Include external microcode header files"
+ depends on !CPU_MICROCODE_MULTIPLE_FILES
help
Select this option if you want to include external c header files
containing the CPU microcode. This will be included as a separate
@@ -116,25 +164,17 @@ config CPU_MICROCODE_CBFS_EXTERNAL_HEADER
The microcode file may be removed from the ROM image at a later
time with cbfstool, if desired.
- If unsure, select "Generate from tree"
+ If unsure, and applicable, select "Generate from tree"
config CPU_MICROCODE_CBFS_NONE
bool "Do not include microcode updates"
help
Select this option if you do not want CPU microcode included in CBFS.
- Note that for some CPUs, the microcode is hard-coded into the source
- tree and is not loaded from CBFS. In this case, microcode will still
- be updated. There is a push to move all microcode to CBFS, but this
- change is not implemented for all CPUs.
-
- This option currently applies to:
- - Intel SandyBridge/IvyBridge
- - VIA Nano
Microcode may be added to the ROM image at a later time with cbfstool,
if desired.
- If unsure, select "Generate from tree"
+ If unsure, and applicable, select "Generate from tree"
The GOOD:
Microcode updates intend to solve issues that have been discovered
@@ -164,8 +204,6 @@ endchoice
config CPU_MICROCODE_MULTIPLE_FILES
bool
- default n
- depends on CPU_MICROCODE_CBFS_GENERATE
help
Select this option to install separate microcode container files into
CBFS instead of using the traditional monolithic microcode file format.
@@ -179,7 +217,7 @@ config CPU_MICROCODE_HEADER_FILES
config CPU_UCODE_BINARIES
string "Microcode binary path and filename"
- depends on CPU_MICROCODE_CBFS_GENERATE
+ depends on CPU_MICROCODE_CBFS_EXTERNAL_BINS
default ""
help
Some platforms have microcode in the blobs directory, and these can
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index 72fc29c1e0..66ee2f9169 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -17,7 +17,7 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32))
################################################################################
ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y)
-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += cpu_microcode_blob.bin
+cbfs-files-$(CONFIG_USE_CPU_MICROCODE_CBFS_BINS) += cpu_microcode_blob.bin
endif
ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
@@ -29,6 +29,11 @@ $(objgenerated)/microcode.bin: $(call strip_quotes,$(CONFIG_CPU_MICROCODE_HEADER
util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES)
endif
+ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y)
+cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES))
+endif
+# otherwise `cpu_microcode_bins` should be filled by platform makefiles
+
# We just mash all microcode binaries together into one binary to rule them all.
# This approach assumes that the microcode binaries are properly padded, and
# their headers specify the correct size. This works fairly well on isolatied
@@ -44,14 +49,15 @@ $(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins))
fi; \
done; \
if [ -n "$$NO_MICROCODE_FILE" ]; then \
- if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_GENERATE)" ]; then \
+ if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS)" ]; then \
echo "Try enabling binary-only repository in Kconfig 'General setup' menu."; \
fi; \
false; \
fi
+ $(if $^,,false) # fail if no file is given at all
@printf " MICROCODE $(subst $(obj)/,,$(@))\n"
@echo $(cpu_microcode_bins)
- cat /dev/null $+ > $@
+ cat $^ > $@
cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
cpu_microcode_blob.bin-type := microcode
diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig
index cd3db0e420..8ff685f0c1 100644
--- a/src/cpu/amd/family_10h-family_15h/Kconfig
+++ b/src/cpu/amd/family_10h-family_15h/Kconfig
@@ -9,7 +9,7 @@ config CPU_AMD_MODEL_10XXX
select UDELAY_LAPIC
select HAVE_MONOTONIC_TIMER
select SUPPORT_CPU_UCODE_IN_CBFS
- select CPU_MICROCODE_MULTIPLE_FILES if !CPU_MICROCODE_CBFS_NONE
+ select CPU_MICROCODE_MULTIPLE_FILES
select ACPI_HUGE_LOWMEM_BACKUP
if CPU_AMD_MODEL_10XXX
diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc
index 2ed76e1e1f..7035323026 100644
--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc
+++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc
@@ -15,11 +15,11 @@ ramstage-y += monotonic_timer.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c
# Microcode for Family 10h, 11h, 12h, and 14h
-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd.bin
+cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS) += microcode_amd.bin
microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin
microcode_amd.bin-type := microcode
# Microcode for Family 15h
-cbfs-files-$(CONFIG_CPU_MICROCODE_MULTIPLE_FILES) += microcode_amd_fam15h.bin
+cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS) += microcode_amd_fam15h.bin
microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin
microcode_amd_fam15h.bin-type := microcode
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig
index 4c79b239b6..79658f9817 100644
--- a/src/cpu/intel/fsp_model_406dx/Kconfig
+++ b/src/cpu/intel/fsp_model_406dx/Kconfig
@@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS
select SSE2
select UDELAY_LAPIC
select SUPPORT_CPU_UCODE_IN_CBFS
+ select MICROCODE_BLOB_NOT_IN_BLOB_REPO
select PARALLEL_CPU_INIT
select TSC_SYNC_MFENCE
select LAPIC_MONOTONIC_TIMER
diff --git a/src/cpu/intel/microcode/Makefile.inc b/src/cpu/intel/microcode/Makefile.inc
index b56e6a7e79..f589430771 100644
--- a/src/cpu/intel/microcode/Makefile.inc
+++ b/src/cpu/intel/microcode/Makefile.inc
@@ -4,5 +4,3 @@
################################################################################
ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
-
-cpu_microcode_bins += $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES))
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-26 23:54:15 +0000