diff options
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/intel/car/core2/cache_as_ram.S | 4 | ||||
| -rw-r--r-- | src/cpu/intel/car/non-evict/cache_as_ram.S | 4 | ||||
| -rw-r--r-- | src/cpu/intel/car/p3/cache_as_ram.S | 4 | ||||
| -rw-r--r-- | src/cpu/intel/car/p4-netburst/cache_as_ram.S | 4 | ||||
| -rw-r--r-- | src/cpu/qemu-x86/cache_as_ram_bootblock.S | 4 | ||||
| -rw-r--r-- | src/cpu/x86/entry16.S | 2 | ||||
| -rw-r--r-- | src/cpu/x86/entry32.S | 2 |
7 files changed, 12 insertions, 12 deletions
diff --git a/src/cpu/intel/car/core2/cache_as_ram.S b/src/cpu/intel/car/core2/cache_as_ram.S index b9104e624e..316b703271 100644 --- a/src/cpu/intel/car/core2/cache_as_ram.S +++ b/src/cpu/intel/car/core2/cache_as_ram.S @@ -16,7 +16,7 @@ _cache_as_ram_setup: bootblock_pre_c_entry: cache_as_ram: - post_code(POST_BOOTBLOCK_CAR) + post_code(POSTCODE_BOOTBLOCK_CAR) /* Send INIT IPI to all excluding ourself. */ movl $0x000C4500, %eax @@ -185,7 +185,7 @@ before_c_entry: call bootblock_c_entry_bist /* Should never see this postcode */ - post_code(POST_DEAD_CODE) + post_code(POSTCODE_DEAD_CODE) .Lhlt: hlt diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S index d47fa725f1..187b1ca9e2 100644 --- a/src/cpu/intel/car/non-evict/cache_as_ram.S +++ b/src/cpu/intel/car/non-evict/cache_as_ram.S @@ -21,7 +21,7 @@ bootblock_pre_c_entry: jmp check_mtrr /* Check if CPU properly reset */ cache_as_ram: - post_code(POST_BOOTBLOCK_CAR) + post_code(POSTCODE_BOOTBLOCK_CAR) /* Send INIT IPI to all excluding ourself. */ movl $0x000C4500, %eax @@ -238,7 +238,7 @@ before_c_entry: call bootblock_c_entry_bist /* Should never see this postcode */ - post_code(POST_DEAD_CODE) + post_code(POSTCODE_DEAD_CODE) .Lhlt: diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S index c19fa3cf6c..1431d323e6 100644 --- a/src/cpu/intel/car/p3/cache_as_ram.S +++ b/src/cpu/intel/car/p3/cache_as_ram.S @@ -14,7 +14,7 @@ _cache_as_ram_setup: bootblock_pre_c_entry: cache_as_ram: - post_code(POST_BOOTBLOCK_CAR) + post_code(POSTCODE_BOOTBLOCK_CAR) /* Clear/disable fixed MTRRs */ mov $fixed_mtrr_list_size, %ebx @@ -160,7 +160,7 @@ before_c_entry: call bootblock_c_entry_bist /* Should never see this postcode */ - post_code(POST_DEAD_CODE) + post_code(POSTCODE_DEAD_CODE) .Lhlt: hlt diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S index efd0d17d54..0362d104fa 100644 --- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S +++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S @@ -20,7 +20,7 @@ _cache_as_ram_setup: bootblock_pre_c_entry: cache_as_ram: - post_code(POST_BOOTBLOCK_CAR) + post_code(POSTCODE_BOOTBLOCK_CAR) movl $LAPIC_BASE_MSR, %ecx rdmsr @@ -385,7 +385,7 @@ before_c_entry: call bootblock_c_entry_bist /* Should never see this postcode */ - post_code(POST_DEAD_CODE) + post_code(POSTCODE_DEAD_CODE) .Lhlt: hlt diff --git a/src/cpu/qemu-x86/cache_as_ram_bootblock.S b/src/cpu/qemu-x86/cache_as_ram_bootblock.S index b414ca141f..fe872debea 100644 --- a/src/cpu/qemu-x86/cache_as_ram_bootblock.S +++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S @@ -15,7 +15,7 @@ bootblock_pre_c_entry: cache_as_ram: - post_code(POST_BOOTBLOCK_CAR) + post_code(POSTCODE_BOOTBLOCK_CAR) /* * Nothing to do here on qemu, RAM works just fine without any * initialization. @@ -104,7 +104,7 @@ before_c_entry: call bootblock_c_entry_bist /* Never returns */ .Lhlt: - post_code(POST_DEAD_CODE) + post_code(POSTCODE_DEAD_CODE) hlt jmp .Lhlt diff --git a/src/cpu/x86/entry16.S b/src/cpu/x86/entry16.S index d045c54937..ff4f1a26d0 100644 --- a/src/cpu/x86/entry16.S +++ b/src/cpu/x86/entry16.S @@ -43,7 +43,7 @@ _start16bit: cli /* Save the BIST result */ movl %eax, %ebp - post_code(POST_RESET_VECTOR_CORRECT) + post_code(POSTCODE_RESET_VECTOR_CORRECT) /* IMMEDIATELY invalidate the translation lookaside buffer (TLB) before * executing any further code. Even though paging is disabled we diff --git a/src/cpu/x86/entry32.S b/src/cpu/x86/entry32.S index 4c8ded0bc7..5c29581090 100644 --- a/src/cpu/x86/entry32.S +++ b/src/cpu/x86/entry32.S @@ -31,7 +31,7 @@ bootblock_protected_mode_entry: /* Save the BIST value */ movl %eax, %ebp - post_code(POST_ENTER_PROTECTED_MODE) + post_code(POSTCODE_ENTER_PROTECTED_MODE) movw $ROM_DATA_SEG, %ax movw %ax, %ds |