diff options
Diffstat (limited to 'src/cpu/ti/am335x/uart.c')
| -rw-r--r-- | src/cpu/ti/am335x/uart.c | 52 |
1 files changed, 26 insertions, 26 deletions
diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index ef8e08cfb8..b2b7196649 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -42,88 +42,88 @@ static void am335x_uart_init(struct am335x_uart *uart, uint16_t div) uint16_t lcr_orig, efr_orig, mcr_orig; /* reset the UART */ - writew(uart->sysc | SYSC_SOFTRESET, &uart->sysc); + write16(&uart->sysc, uart->sysc | SYSC_SOFTRESET); while (!(read16(&uart->syss) & SYSS_RESETDONE)) ; /* 1. switch to register config mode B */ lcr_orig = read16(&uart->lcr); - writew(0xbf, &uart->lcr); + write16(&uart->lcr, 0xbf); /* * 2. Set EFR ENHANCED_EN bit. To access this bit, registers must * be in TCR_TLR submode, meaning EFR[4] = 1 and MCR[6] = 1. */ efr_orig = read16(&uart->efr); - writew(efr_orig | EFR_ENHANCED_EN, &uart->efr); + write16(&uart->efr, efr_orig | EFR_ENHANCED_EN); /* 3. Switch to register config mode A */ - writew(0x80, &uart->lcr); + write16(&uart->lcr, 0x80); /* 4. Enable register submode TCR_TLR to access the UARTi.UART_TLR */ mcr_orig = read16(&uart->mcr); - writew(mcr_orig | MCR_TCR_TLR, &uart->mcr); + write16(&uart->mcr, mcr_orig | MCR_TCR_TLR); /* 5. Enable the FIFO. For now we'll ignore FIFO triggers and DMA */ - writew(FCR_FIFO_EN, &uart->fcr); + write16(&uart->fcr, FCR_FIFO_EN); /* 6. Switch to configuration mode B */ - writew(0xbf, &uart->lcr); + write16(&uart->lcr, 0xbf); /* Skip steps 7 and 8 (setting up FIFO triggers for DMA) */ /* 9. Restore original EFR value */ - writew(efr_orig, &uart->efr); + write16(&uart->efr, efr_orig); /* 10. Switch to config mode A */ - writew(0x80, &uart->lcr); + write16(&uart->lcr, 0x80); /* 11. Restore original MCR value */ - writew(mcr_orig, &uart->mcr); + write16(&uart->mcr, mcr_orig); /* 12. Restore original LCR value */ - writew(lcr_orig, &uart->lcr); + write16(&uart->lcr, lcr_orig); /* Protocol, baud rate and interrupt settings */ /* 1. Disable UART access to DLL and DLH registers */ - writew(read16(&uart->mdr1) | 0x7, &uart->mdr1); + write16(&uart->mdr1, read16(&uart->mdr1) | 0x7); /* 2. Switch to config mode B */ - writew(0xbf, &uart->lcr); + write16(&uart->lcr, 0xbf); /* 3. Enable access to IER[7:4] */ - writew(efr_orig | EFR_ENHANCED_EN, &uart->efr); + write16(&uart->efr, efr_orig | EFR_ENHANCED_EN); /* 4. Switch to operational mode */ - writew(0x0, &uart->lcr); + write16(&uart->lcr, 0x0); /* 5. Clear IER */ - writew(0x0, &uart->ier); + write16(&uart->ier, 0x0); /* 6. Switch to config mode B */ - writew(0xbf, &uart->lcr); + write16(&uart->lcr, 0xbf); /* 7. Set dll and dlh to the desired values (table 19-25) */ - writew((div >> 8), &uart->dlh); - writew((div & 0xff), &uart->dll); + write16(&uart->dlh, (div >> 8)); + write16(&uart->dll, (div & 0xff)); /* 8. Switch to operational mode to access ier */ - writew(0x0, &uart->lcr); + write16(&uart->lcr, 0x0); /* 9. Clear ier to disable all interrupts */ - writew(0x0, &uart->ier); + write16(&uart->ier, 0x0); /* 10. Switch to config mode B */ - writew(0xbf, &uart->lcr); + write16(&uart->lcr, 0xbf); /* 11. Restore efr */ - writew(efr_orig, &uart->efr); + write16(&uart->efr, efr_orig); /* 12. Set protocol formatting 8n1 (8 bit data, no parity, 1 stop bit) */ - writew(0x3, &uart->lcr); + write16(&uart->lcr, 0x3); /* 13. Load the new UART mode */ - writew(0x0, &uart->mdr1); + write16(&uart->mdr1, 0x0); } /* @@ -145,7 +145,7 @@ static void am335x_uart_tx_byte(struct am335x_uart *uart, unsigned char data) { while (!(read16(&uart->lsr) & LSR_TXFIFOE)); - return writeb(data, &uart->thr); + return write8(&uart->thr, data); } unsigned int uart_platform_refclk(void) |