diff options
Diffstat (limited to 'src/cpu/ppc')
| -rw-r--r-- | src/cpu/ppc/mpc74xx/Config.lb | 2 | ||||
| -rw-r--r-- | src/cpu/ppc/mpc74xx/mpc74xx.inc | 4 | ||||
| -rw-r--r-- | src/cpu/ppc/ppc4xx/Config.lb | 2 | ||||
| -rw-r--r-- | src/cpu/ppc/ppc7xx/Config.lb | 2 | ||||
| -rw-r--r-- | src/cpu/ppc/ppc7xx/ppc7xx.inc | 4 |
5 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/ppc/mpc74xx/Config.lb b/src/cpu/ppc/mpc74xx/Config.lb index 8665fa35c0..ee65e41f3b 100644 --- a/src/cpu/ppc/mpc74xx/Config.lb +++ b/src/cpu/ppc/mpc74xx/Config.lb @@ -10,7 +10,7 @@ uses DCACHE_RAM_SIZE ## Use cache ram for initial setup ## default USE_DCACHE_RAM=1 -## Set dcache ram above linuxbios image +## Set dcache ram above coreboot image default DCACHE_RAM_BASE=_RAMBASE+0x100000 ## Dcache size is 32Kb default DCACHE_RAM_SIZE=0x8000 diff --git a/src/cpu/ppc/mpc74xx/mpc74xx.inc b/src/cpu/ppc/mpc74xx/mpc74xx.inc index aa55df8789..ba2c0018d5 100644 --- a/src/cpu/ppc/mpc74xx/mpc74xx.inc +++ b/src/cpu/ppc/mpc74xx/mpc74xx.inc @@ -19,7 +19,7 @@ /* * The aim of this code is to bring the machine from power-on to the point - * where we can jump to the the main LinuxBIOS entry point hardwaremain() + * where we can jump to the the main coreboot entry point hardwaremain() * which is written in C. * * At power-on, we have no RAM, a memory-mapped I/O space, and we are executing @@ -79,7 +79,7 @@ isync /* - * Clear segment registers (LinuxBIOS doesn't use these) + * Clear segment registers (coreboot doesn't use these) */ mtsr 0, r0 isync diff --git a/src/cpu/ppc/ppc4xx/Config.lb b/src/cpu/ppc/ppc4xx/Config.lb index 4bf4638762..f739495325 100644 --- a/src/cpu/ppc/ppc4xx/Config.lb +++ b/src/cpu/ppc/ppc4xx/Config.lb @@ -10,7 +10,7 @@ uses DCACHE_RAM_SIZE ## PPC4XX always uses cache ram for initial setup ## default USE_DCACHE_RAM=1 -## Set dcache ram above linuxbios image +## Set dcache ram above coreboot image default DCACHE_RAM_BASE=_RAMBASE+0x100000 ## Dcache size is 16Kb default DCACHE_RAM_SIZE=16384 diff --git a/src/cpu/ppc/ppc7xx/Config.lb b/src/cpu/ppc/ppc7xx/Config.lb index dc2c025511..d6e64b379b 100644 --- a/src/cpu/ppc/ppc7xx/Config.lb +++ b/src/cpu/ppc/ppc7xx/Config.lb @@ -10,7 +10,7 @@ uses DCACHE_RAM_SIZE ## PPC7XX always uses cache ram for initial setup ## default USE_DCACHE_RAM=1 -## Set dcache ram above linuxbios image +## Set dcache ram above coreboot image default DCACHE_RAM_BASE=_RAMBASE+0x100000 ## Dcache size is 16Kb default DCACHE_RAM_SIZE=16384 diff --git a/src/cpu/ppc/ppc7xx/ppc7xx.inc b/src/cpu/ppc/ppc7xx/ppc7xx.inc index 11b54c4207..bd599f324e 100644 --- a/src/cpu/ppc/ppc7xx/ppc7xx.inc +++ b/src/cpu/ppc/ppc7xx/ppc7xx.inc @@ -19,7 +19,7 @@ /* * The aim of this code is to bring the machine from power-on to the point - * where we can jump to the the main LinuxBIOS entry point hardwaremain() + * where we can jump to the the main coreboot entry point hardwaremain() * which is written in C. * * At power-on, we have no RAM, a memory-mapped I/O space, and we are executing @@ -72,7 +72,7 @@ isync /* - * Clear segment registers (LinuxBIOS doesn't use these) + * Clear segment registers (coreboot doesn't use these) */ li r3, 15 1: mtsrin r3, r0 |