aboutsummaryrefslogtreecommitdiff
path: root/src/cpu/intel/slot_1
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel/slot_1')
-rw-r--r--src/cpu/intel/slot_1/Kconfig2
-rw-r--r--src/cpu/intel/slot_1/Makefile.inc4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig
index f535a03bf1..ab6663258f 100644
--- a/src/cpu/intel/slot_1/Kconfig
+++ b/src/cpu/intel/slot_1/Kconfig
@@ -28,7 +28,7 @@ config SLOT_SPECIFIC_OPTIONS # dummy
config DCACHE_RAM_BASE
hex
- default 0xce000
+ default 0xfefc0000
config DCACHE_RAM_SIZE
hex
diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc
index ca7c154298..9e34106db2 100644
--- a/src/cpu/intel/slot_1/Makefile.inc
+++ b/src/cpu/intel/slot_1/Makefile.inc
@@ -28,5 +28,5 @@ subdirs-y += ../../x86/cache
subdirs-y += ../../x86/smm
subdirs-y += ../microcode
-cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc
-romstage-y += ../car/romstage_legacy.c
+cpu_incs-y += $(src)/cpu/intel/car/p3/cache_as_ram.S
+romstage-y += ../car/romstage.c