diff options
Diffstat (limited to 'src/cpu/intel/model_f3x')
| -rw-r--r-- | src/cpu/intel/model_f3x/microcode_M1DF340E.h | 2 | ||||
| -rw-r--r-- | src/cpu/intel/model_f3x/microcode_M1DF3413.h | 8 | ||||
| -rw-r--r-- | src/cpu/intel/model_f3x/model_f3x_init.c | 4 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/intel/model_f3x/microcode_M1DF340E.h b/src/cpu/intel/model_f3x/microcode_M1DF340E.h index a378fba8ac..55854b583a 100644 --- a/src/cpu/intel/model_f3x/microcode_M1DF340E.h +++ b/src/cpu/intel/model_f3x/microcode_M1DF340E.h @@ -9,7 +9,7 @@ */ /* M1DF340E.TXT - Noconoa D-0 */ - + 0x00000001, /* Header Version */ 0x0000000e, /* Patch ID */ diff --git a/src/cpu/intel/model_f3x/microcode_M1DF3413.h b/src/cpu/intel/model_f3x/microcode_M1DF3413.h index f2a0a8f79d..676d67c061 100644 --- a/src/cpu/intel/model_f3x/microcode_M1DF3413.h +++ b/src/cpu/intel/model_f3x/microcode_M1DF3413.h @@ -2,7 +2,7 @@ * microcode update lengths. They are encoded in int 8 and 9. A * dummy header of nulls must terminate the list. */ - + /* Copyright Intel Corporation, 1995, 96, 97, 98, 99, 2000. These microcode updates are distributed for the sole purpose of @@ -12,9 +12,9 @@ on such systems. You are not authorized to use this material for any other purpose. */ - + /* M1DF3413.TXT - Noconoa D-0 */ - + 0x00000001, /* Header Version */ 0x00000013, /* Patch ID */ 0x07302004, /* DATE */ @@ -27,7 +27,7 @@ 0x00000000, /* reserved */ 0x00000000, /* reserved */ 0x00000000, /* reserved */ - + 0x9fbf327a, 0x2b41b451, 0xb2abaca8, diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index cbdd50ac2f..68b22c99a8 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -17,7 +17,7 @@ static uint32_t microcode_updates[] = { * microcode update lengths. They are encoded in int 8 and 9. A * dummy header of nulls must terminate the list. */ - + #include "microcode_M1DF3413.h" /* Dummy terminator */ 0x0, 0x0, 0x0, 0x0, @@ -33,7 +33,7 @@ static void model_f3x_init(device_t cpu) x86_enable_cache(); x86_setup_mtrrs(36); x86_mtrr_check(); - + /* Update the microcode */ intel_update_microcode(microcode_updates); |