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-rw-r--r--src/cpu/intel/model_6fx/cache_as_ram.inc3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/intel/model_6fx/cache_as_ram.inc b/src/cpu/intel/model_6fx/cache_as_ram.inc
index 61feb1d8b5..d8d25a0cb7 100644
--- a/src/cpu/intel/model_6fx/cache_as_ram.inc
+++ b/src/cpu/intel/model_6fx/cache_as_ram.inc
@@ -23,8 +23,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/post_code.h>
-#define CPU_MAXPHYADDR 36
-#define CPU_PHYSMASK_HI (1 << (CPU_MAXPHYADDR - 32) - 1)
+#define CPU_PHYSMASK_HI (1 << (CONFIG_CPU_ADDR_BITS - 32) - 1)
#define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE
#define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE