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Diffstat (limited to 'src/cpu/intel/model_6ex/cache_as_ram_disable.c')
-rw-r--r--src/cpu/intel/model_6ex/cache_as_ram_disable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/model_6ex/cache_as_ram_disable.c b/src/cpu/intel/model_6ex/cache_as_ram_disable.c
index 29e726a272..f859336adf 100644
--- a/src/cpu/intel/model_6ex/cache_as_ram_disable.c
+++ b/src/cpu/intel/model_6ex/cache_as_ram_disable.c
@@ -19,7 +19,7 @@
* MA 02110-1301 USA
*/
-
+#include <arch/stages.h>
/* called from assembler code */
void stage1_main(unsigned long bist);