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-rw-r--r--src/cpu/intel/model_106cx/Makefile.inc1
-rw-r--r--src/cpu/intel/model_106cx/model_106cx_init.c12
2 files changed, 9 insertions, 4 deletions
diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc
index 0703099097..eec544d79a 100644
--- a/src/cpu/intel/model_106cx/Makefile.inc
+++ b/src/cpu/intel/model_106cx/Makefile.inc
@@ -2,5 +2,6 @@ ramstage-y += model_106cx_init.c
subdirs-y += ../../x86/name
subdirs-y += ../common
subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
+ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin
diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index a609aed550..24a9ad29f6 100644
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -85,15 +85,18 @@ static void model_106cx_init(struct device *cpu)
x86_enable_cache();
/* Update the microcode */
- intel_update_microcode_from_cbfs();
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP))
+ intel_update_microcode_from_cbfs();
/* Print processor name */
fill_processor_name(processor_name);
printk(BIOS_INFO, "CPU: %s.\n", processor_name);
/* Setup MTRRs */
- x86_setup_mtrrs();
- x86_mtrr_check();
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP)) {
+ x86_setup_mtrrs();
+ x86_mtrr_check();
+ }
/* Enable the local CPU APICs */
setup_lapic();
@@ -110,7 +113,8 @@ static void model_106cx_init(struct device *cpu)
/* TODO: PIC thermal sensor control */
/* Start up my CPU siblings */
- intel_sibling_init(cpu);
+ if (!IS_ENABLED(CONFIG_PARALLEL_MP))
+ intel_sibling_init(cpu);
}
static struct device_operations cpu_dev_ops = {