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Diffstat (limited to 'src/cpu/amd/geode_lx/cpureginit.c')
-rw-r--r--src/cpu/amd/geode_lx/cpureginit.c14
1 files changed, 2 insertions, 12 deletions
diff --git a/src/cpu/amd/geode_lx/cpureginit.c b/src/cpu/amd/geode_lx/cpureginit.c
index 30d95959fe..79e0a708e1 100644
--- a/src/cpu/amd/geode_lx/cpureginit.c
+++ b/src/cpu/amd/geode_lx/cpureginit.c
@@ -20,16 +20,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/**************************************************************************
-;*
-;* SetDelayControl
-;*
-;*************************************************************************/
+/* SetDelayControl */
#include "cpu/x86/msr.h"
-
-
/**
* Delay Control Settings table from AMD (MCP 0x4C00000F).
*/
@@ -39,8 +33,6 @@ static const msrinit_t delay_msr_table[] = {
{CPU_BC_MSS_ARRAY_CTL2, {.hi = 0x00000106, .lo = 0x83104104}},
};
-
-
static const struct delay_controls {
u8 dimms;
u8 devices;
@@ -171,9 +163,7 @@ static void SetDelayControl(u8 dimm0, u8 dimm1, int terminated)
wrmsr(GLCP_DELAY_CONTROLS, msr);
}
-/* ***************************************************************************/
-/* * cpuRegInit*/
-/* ***************************************************************************/
+/* cpuRegInit */
void cpuRegInit(int debug_clock_disable, u8 dimm0, u8 dimm1, int terminated)
{
int msrnum;