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-rw-r--r--src/cpu/amd/agesa/family16kb/model_16_init.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c
index c86f8acdef..2915565078 100644
--- a/src/cpu/amd/agesa/family16kb/model_16_init.c
+++ b/src/cpu/amd/agesa/family16kb/model_16_init.c
@@ -23,9 +23,10 @@ static void model_16_init(struct device *dev)
u32 siblings;
#endif
- //enable_cache();
- //amd_setup_mtrrs();
- //x86_mtrr_check();
+ /*
+ * AGESA sets the MTRRs main MTRRs. The shadow area needs to be set
+ * by coreboot.
+ */
disable_cache();
/* Enable access to AMD RdDram and WrDram extension bits */
msr = rdmsr(SYSCFG_MSR);