diff options
Diffstat (limited to 'src/cpu/amd/agesa/family15tn')
| -rw-r--r-- | src/cpu/amd/agesa/family15tn/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family15tn/fixme.c | 7 |
2 files changed, 0 insertions, 8 deletions
diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index 3f8a3f07c2..1f41560a4d 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -15,7 +15,6 @@ config CPU_AMD_AGESA_FAMILY15_TN bool - select PCI_IO_CFG_EXT select MMCONF_SUPPORT_DEFAULT select X86_AMD_FIXED_MTRRS diff --git a/src/cpu/amd/agesa/family15tn/fixme.c b/src/cpu/amd/agesa/family15tn/fixme.c index b7d890392e..b35d115692 100644 --- a/src/cpu/amd/agesa/family15tn/fixme.c +++ b/src/cpu/amd/agesa/family15tn/fixme.c @@ -72,13 +72,6 @@ void amd_initmmio(void) MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse (CONFIG_MMCONF_BUS_NUMBER) << 2) | 1; LibAmdMsrWrite (0xC0010058, &MsrReg, &StdHeader); - /* - Set the NB_CFG MSR register. Enable CF8 extended configuration cycles. - */ - LibAmdMsrRead (0xC001001F, &MsrReg, &StdHeader); - MsrReg = MsrReg | 0x0000400000000000; - LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader); - /* Set ROM cache onto WP to decrease post time */ MsrReg = (0x0100000000ull - CACHE_ROM_SIZE) | 5ull; LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader); |