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-rw-r--r--src/cpu/amd/agesa/family14/Kconfig1
-rw-r--r--src/cpu/amd/agesa/family14/fixme.c7
2 files changed, 0 insertions, 8 deletions
diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig
index 5ac601cd66..7be63f5fcb 100644
--- a/src/cpu/amd/agesa/family14/Kconfig
+++ b/src/cpu/amd/agesa/family14/Kconfig
@@ -15,7 +15,6 @@
config CPU_AMD_AGESA_FAMILY14
bool
- select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
diff --git a/src/cpu/amd/agesa/family14/fixme.c b/src/cpu/amd/agesa/family14/fixme.c
index 25a32bdb9c..9a171ede40 100644
--- a/src/cpu/amd/agesa/family14/fixme.c
+++ b/src/cpu/amd/agesa/family14/fixme.c
@@ -78,13 +78,6 @@ void amd_initmmio(void)
MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse(CONFIG_MMCONF_BUS_NUMBER) << 2) | 1;
LibAmdMsrWrite(0xC0010058, &MsrReg, &StdHeader);
- /*
- Set the NB_CFG MSR register. Enable CF8 extended configuration cycles.
- */
- LibAmdMsrRead(0xC001001F, &MsrReg, &StdHeader);
- MsrReg = MsrReg | 0x0000400000000000ull;
- LibAmdMsrWrite(0xC001001F, &MsrReg, &StdHeader);
-
/* Set Ontario Link Data */
PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0, 0, 0xE0);
PciData = 0x01308002;