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-rw-r--r--src/arch/i386/Makefile.inc4
-rw-r--r--src/arch/i386/boot/coreboot_table.c11
2 files changed, 9 insertions, 6 deletions
diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc
index 1d6434659d..8d3e509670 100644
--- a/src/arch/i386/Makefile.inc
+++ b/src/arch/i386/Makefile.inc
@@ -59,9 +59,9 @@ $(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mai
@printf " OPTION $(subst $(obj)/,,$(@))\n"
$(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c
-$(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h
+$(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h
@printf " HOSTCC $(subst $(obj)/,,$(@))\n"
- $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@
+ $(HOSTCC) $(HOSTCFLAGS) $< -o $@
#######################################################################
# Build the coreboot_ram (stage 2)
diff --git a/src/arch/i386/boot/coreboot_table.c b/src/arch/i386/boot/coreboot_table.c
index 8baaab4f60..d904c91ec4 100644
--- a/src/arch/i386/boot/coreboot_table.c
+++ b/src/arch/i386/boot/coreboot_table.c
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2003-2004 Eric Biederman
- * Copyright (C) 2005-2009 coresystems GmbH
+ * Copyright (C) 2005-2010 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -29,6 +29,9 @@
#include <version.h>
#include <device/device.h>
#include <stdlib.h>
+#if (CONFIG_HAVE_OPTION_TABLE == 1)
+#include <pc80/mc146818rtc.h>
+#endif
static struct lb_header *lb_table_init(unsigned long addr)
{
@@ -196,9 +199,9 @@ static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header)
cmos_checksum->size = (sizeof(*cmos_checksum));
- cmos_checksum->range_start = CONFIG_LB_CKS_RANGE_START * 8;
- cmos_checksum->range_end = ( CONFIG_LB_CKS_RANGE_END * 8 ) + 7;
- cmos_checksum->location = CONFIG_LB_CKS_LOC * 8;
+ cmos_checksum->range_start = LB_CKS_RANGE_START * 8;
+ cmos_checksum->range_end = ( LB_CKS_RANGE_END * 8 ) + 7;
+ cmos_checksum->location = LB_CKS_LOC * 8;
cmos_checksum->type = CHECKSUM_PCBIOS;
return cmos_checksum;