1 files changed, 42 insertions, 0 deletions
diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld
new file mode 100644
index 0000000000..43c522918f
--- /dev/null
+++ b/src/arch/x86/memlayout.ld
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <memlayout.h>
+#include <arch/header.ld>
+
+SECTIONS
+{
+	/*
+	 * It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively
+	 * like other architectures/chipsets it's not possible because of
+	 * the linking games played during romstage creation by trying
+	 * to find the final landing place in CBFS for XIP. Therefore,
+	 * conditionalize with macros.
+	 */
+#if ENV_RAMSTAGE
+	RAMSTAGE(CONFIG_RAMBASE, CONFIG_RAMTOP - CONFIG_RAMBASE)
+
+#elif ENV_ROMSTAGE
+	/* The 1M size is not allocated. It's just for basic size checking. */
+	ROMSTAGE(ROMSTAGE_BASE, 1M)
+
+	/* Pull in the cache-as-ram rules. */
+	#include "car.ld"
+#endif
+}