5 files changed, 3 insertions, 69 deletions
diff --git a/src/arch/riscv/Makefile.mk b/src/arch/riscv/Makefile.mk
index 6754c2202d..c370e3ece1 100644
--- a/src/arch/riscv/Makefile.mk
+++ b/src/arch/riscv/Makefile.mk
@@ -96,7 +96,6 @@ endif #CONFIG_ARCH_BOOTBLOCK_RISCV
 ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y)
 
 romstage-$(CONFIG_SEPARATE_ROMSTAGE) += romstage.S
-romstage-y += ramdetect.c
 
 # Build the romstage
 
@@ -120,7 +119,6 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y)
 
 ramstage-y =
 ramstage-y += ramstage.S
-ramstage-y += ramdetect.c
 ramstage-y += tables.c
 ramstage-y += payload.c
 ramstage-y += fit_payload.c
diff --git a/src/arch/riscv/include/arch/exception.h b/src/arch/riscv/include/arch/exception.h
index 2eb575e608..976d752530 100644
--- a/src/arch/riscv/include/arch/exception.h
+++ b/src/arch/riscv/include/arch/exception.h
@@ -26,7 +26,7 @@ static inline void exception_init(void)
 }
 
 void redirect_trap(void);
-void default_trap_handler(struct trapframe *tf);
+void trap_handler(struct trapframe *tf);
 void handle_supervisor_call(struct trapframe *tf);
 
 #endif
diff --git a/src/arch/riscv/ramdetect.c b/src/arch/riscv/ramdetect.c
deleted file mode 100644
index 048d396ffe..0000000000
--- a/src/arch/riscv/ramdetect.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <arch/exception.h>
-#include <types.h>
-#include <console/console.h>
-#include <device/mmio.h>
-#include <ramdetect.h>
-#include <arch/smp/spinlock.h>
-#include <vm.h>
-
-static enum {
-	ABORT_CHECKER_NOT_TRIGGERED,
-	ABORT_CHECKER_TRIGGERED,
-} abort_state = ABORT_CHECKER_NOT_TRIGGERED;
-
-extern void (*trap_handler)(struct trapframe *tf);
-
-static int get_instruction_len(uintptr_t addr)
-{
-	uint16_t ins = read16p(addr);
-
-	/*
-	 * 16-bit or 32-bit instructions supported
-	 */
-	if ((ins & 0x3) != 3) {
-		return 2;
-	} else if ((ins & 0x1f) != 0x1f) {
-		return 4;
-	}
-
-	die("Not a 16bit or 32bit instruction 0x%x\n", ins);
-}
-
-static void ramcheck_trap_handler(struct trapframe *tf)
-{
-	abort_state = ABORT_CHECKER_TRIGGERED;
-
-	/*
-	 * skip read instruction.
-	 */
-	int insn_size = get_instruction_len(tf->epc);
-
-	write_csr(mepc, read_csr(mepc) + insn_size);
-}
-
-int probe_mb(const uintptr_t dram_start, const uintptr_t size)
-{
-	uintptr_t addr = dram_start + (size * MiB) - sizeof(uint32_t);
-	void *ptr = (void *)addr;
-
-	abort_state = ABORT_CHECKER_NOT_TRIGGERED;
-	trap_handler = ramcheck_trap_handler;
-	barrier();
-	read32(ptr);
-	trap_handler = default_trap_handler;
-	barrier();
-	printk(BIOS_DEBUG, "%lx is %s DRAM\n", dram_start + size * MiB,
-	       abort_state == ABORT_CHECKER_NOT_TRIGGERED ? "" : "not");
-
-	return abort_state == ABORT_CHECKER_NOT_TRIGGERED;
-}
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c
index 2f22ce29e5..6a151a6e41 100644
--- a/src/arch/riscv/trap_handler.c
+++ b/src/arch/riscv/trap_handler.c
@@ -109,9 +109,7 @@ static void interrupt_handler(struct trapframe *tf)
 	}
 }
 
-void (*trap_handler)(struct trapframe *tf) = default_trap_handler;
-
-void default_trap_handler(struct trapframe *tf)
+void trap_handler(struct trapframe *tf)
 {
 	if (tf->cause & 0x8000000000000000ULL) {
 		interrupt_handler(tf);
diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index d6a93b0ced..d81f884b00 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -120,8 +120,7 @@ trap_entry:
 
 	mv a0,sp # put trapframe as first argument
 
-	LOAD	t0, trap_handler
-	jalr	t0
+	jal trap_handler
 
 trap_return:
 	restore_regs