diff options
Diffstat (limited to 'src/arch/mips')
| -rw-r--r-- | src/arch/mips/Makefile.inc | 19 | ||||
| -rw-r--r-- | src/arch/mips/bootblock.S | 6 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/header.ld (renamed from src/arch/mips/bootblock.ld) | 39 | ||||
| -rw-r--r-- | src/arch/mips/include/arch/memlayout.h | 31 | ||||
| -rw-r--r-- | src/arch/mips/ramstage.ld | 121 | ||||
| -rw-r--r-- | src/arch/mips/romstage.ld | 72 | ||||
| -rw-r--r-- | src/arch/mips/stages.c | 2 |
7 files changed, 49 insertions, 241 deletions
diff --git a/src/arch/mips/Makefile.inc b/src/arch/mips/Makefile.inc index 969a03d2e3..9e88ba8ce8 100644 --- a/src/arch/mips/Makefile.inc +++ b/src/arch/mips/Makefile.inc @@ -43,17 +43,15 @@ bootblock-y += ../../lib/memcpy.c bootblock-y += ../../lib/memmove.c bootblock-y += ../../lib/memset.c -bootblock-y += bootblock.ld - # Much of the assembly code is generated by the compiler, and may contain # terms which the preprocessor will happily go on to replace. For example # "mips" would be replaced with "1". Clear all the built in definitions to # prevent that. bootblock-S-ccopts += -undef -$(objcbfs)/bootblock.debug: $(obj)/arch/mips/bootblock.bootblock.ld $$(bootblock-objs) $(obj)/config.h +$(objcbfs)/bootblock.debug: $$(bootblock-objs) $(obj)/config.h @printf " LINK $(subst $(obj)/,,$(@))\n" - $(LD_bootblock) --gc-sections -static -o $@ -L$(obj) -T $(obj)/arch/mips/bootblock.bootblock.ld --start-group $(bootblock-objs) --end-group + $(LD_bootblock) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.bootblock.ld --start-group $(filter-out %.ld,$(bootblock-objs)) --end-group endif # CONFIG_ARCH_BOOTBLOCK_MIPS @@ -71,11 +69,9 @@ romstage-y += ../../lib/memcpy.c romstage-y += ../../lib/memmove.c romstage-y += ../../lib/memset.c -romstage-y += romstage.ld - -$(objcbfs)/romstage.debug: $$(romstage-objs) $(obj)/arch/mips/romstage.romstage.ld +$(objcbfs)/romstage.debug: $$(romstage-objs) @printf " LINK $(subst $(obj)/,,$(@))\n" - $(LD_romstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/arch/mips/romstage.romstage.ld --start-group $(romstage-objs) --end-group + $(LD_romstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.romstage.ld --start-group $(filter-out %.ld,$(romstage-objs)) --end-group endif # CONFIG_ARCH_ROMSTAGE_MIPS @@ -93,12 +89,11 @@ ramstage-y += timer.c ramstage-y += ../../lib/memcpy.c ramstage-y += ../../lib/memmove.c ramstage-y += ../../lib/memset.c -ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) -ramstage-y += ramstage.ld +ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) -$(objcbfs)/ramstage.debug: $$(ramstage-objs) $(obj)/arch/mips/ramstage.ramstage.ld +$(objcbfs)/ramstage.debug: $$(ramstage-objs) @printf " CC $(subst $(obj)/,,$(@))\n" - $(LD_ramstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/arch/mips/ramstage.ramstage.ld --start-group $(ramstage-objs) --end-group + $(LD_ramstage) --gc-sections -static -o $@ -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.ramstage.ld --start-group $(filter-out %.ld,$(ramstage-objs)) --end-group endif # CONFIG_ARCH_RAMSTAGE_MIPS diff --git a/src/arch/mips/bootblock.S b/src/arch/mips/bootblock.S index f369e006fa..8899fe0a97 100644 --- a/src/arch/mips/bootblock.S +++ b/src/arch/mips/bootblock.S @@ -19,17 +19,17 @@ .set noreorder /* Prevent assembler from "optimizing" this code. */ -.section ".start", "ax", %progbits +.section ".text._start", "ax", %progbits .globl _start _start: /* Set the stack pointer */ - li $sp, CONFIG_BOOTBLOCK_STACK_TOP + la $sp, _estack /* * Initialise the stack to a known value, used later to check for * overflow. */ - li $t0, CONFIG_BOOTBLOCK_STACK_BOTTOM + la $t0, _stack addi $t1, $sp, -4 li $t2, 0xdeadbeef 1: sw $t2, 0($t0) diff --git a/src/arch/mips/bootblock.ld b/src/arch/mips/include/arch/header.ld index 3721f85641..0c7d7a1582 100644 --- a/src/arch/mips/bootblock.ld +++ b/src/arch/mips/include/arch/header.ld @@ -1,9 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2006 Advanced Micro Devices, Inc. - * Copyright (C) 2008-2010 coresystems GmbH - * Copyright (C) 2014 Imagination Technologies + * Copyright 2014 Google Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,39 +17,16 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +/* We use ELF as output format. So that we can debug the code in some form. */ OUTPUT_ARCH(mips) -ENTRY(_start) - PHDRS { to_load PT_LOAD; } -preram_cbmem_console = CONFIG_CBMEM_CONSOLE_PRERAM_BASE; - -SECTIONS -{ - . = CONFIG_BOOTBLOCK_BASE; - - /* This section might be better named .setup */ - .rom : { - _rom = .; - *(.start); - *(.id); - *(.text); - *(.text.*); - *(.rom.text); - *(.rom.data); - *(.rom.data.*); - *(.rodata.*); - _erom = .; - } : to_load = 0xff - - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - } -} +#ifdef __BOOTBLOCK__ +ENTRY(_start) +#else +ENTRY(stage_entry) +#endif diff --git a/src/arch/mips/include/arch/memlayout.h b/src/arch/mips/include/arch/memlayout.h new file mode 100644 index 0000000000..4cbbe1d02b --- /dev/null +++ b/src/arch/mips/include/arch/memlayout.h @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This file contains macro definitions for memlayout.ld linker scripts. */ + +#ifndef __ARCH_MEMLAYOUT_H +#define __ARCH_MEMLAYOUT_H + +/* MIPS stacks need 8-byte alignment and stay in one place through ramstage. */ +/* TODO: Double-check that that's the correct alignment for our ABI. */ +#define STACK(addr, size) REGION(stack, addr, size, 8) + +/* TODO: Need to add DMA_COHERENT region like on ARM? */ + +#endif /* __ARCH_MEMLAYOUT_H */ diff --git a/src/arch/mips/ramstage.ld b/src/arch/mips/ramstage.ld deleted file mode 100644 index 405244446f..0000000000 --- a/src/arch/mips/ramstage.ld +++ /dev/null @@ -1,121 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Imagination Technologies - * - * Based on src/arch/arm/ramstage.ld: - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -OUTPUT_ARCH(mips) - -ENTRY(stage_entry) - -PHDRS -{ - to_load PT_LOAD; -} - -SECTIONS -{ - . = CONFIG_SYS_SDRAM_BASE; - - .text : { - _text = .; - _start = .; - *(.text.stage_entry.mips); - *(.text); - *(.text.*); - . = ALIGN(16); - _etext = .; - } : to_load - - .ctors : { - . = ALIGN(0x100); - __CTOR_LIST__ = .; - *(.ctors); - LONG(0); - __CTOR_END__ = .; - } - - .rodata : { - _rodata = .; - . = ALIGN(4); - console_drivers = .; - KEEP(*(.rodata.console_drivers)); - econsole_drivers = . ; - . = ALIGN(4); - pci_drivers = . ; - KEEP(*(.rodata.pci_driver)); - epci_drivers = . ; - cpu_drivers = . ; - KEEP(*(.rodata.cpu_driver)); - ecpu_drivers = . ; - _bs_init_begin = .; - KEEP(*(.bs_init)); - _bs_init_end = .; - *(.rodata) - *(.rodata.*) - . = ALIGN(4); - _erodata = .; - } - - .data : { - _data = .; - *(.data) - _edata = .; - } - - /* bss will be cleared by cbfs_load_stage */ - _bss = .; - .bss . : { - *(.bss) - *(.sbss) - *(COMMON) - } - _ebss = .; - _end = .; - - /* - * coreboot from the perspective of the loader really "ends" - * here. Only symbols are placed after this. - */ - - _heap = .; - _eheap = . + CONFIG_HEAP_SIZE; - - _stack = CONFIG_STACK_BOTTOM; - _estack = CONFIG_STACK_TOP; - - /* - * The ram segment. This includes all memory used by the memory - * resident copy of coreboot, except the tables that are produced on - * the fly, but including stack and heap. - */ - _ram_seg = _text; - _eram_seg = _eheap; - - /* Discard the sections we don't need/want */ - - /DISCARD/ : { - *(.comment) - *(.note) - *(.note.*) - } -} diff --git a/src/arch/mips/romstage.ld b/src/arch/mips/romstage.ld deleted file mode 100644 index 8964285230..0000000000 --- a/src/arch/mips/romstage.ld +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Imagination Technologies - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - */ - -OUTPUT_ARCH(mips) - -ENTRY(stage_entry) - -PHDRS -{ - to_load PT_LOAD; -} - -preram_cbmem_console = CONFIG_CBMEM_CONSOLE_PRERAM_BASE; - -SECTIONS -{ - . = CONFIG_ROMSTAGE_BASE; - - .romtext . : { - _rom = .; - _start = .; - *(.text.stage_entry.mips); - *(.text.startup); - *(.text); - } : to_load - - .romdata . : { - *(.rodata); - *(.data); - . = ALIGN(16); - _erom = .; - } - - /* bss will be cleared by cbfs_load_stage */ - .bss . : { - . = ALIGN(8); - _bss = .; - *(.bss) - *(.sbss) - *(COMMON) - } - - _ebss = .; - _end = .; - - /* Discard the sections we don't need/want */ - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - *(.eh_frame); - } -} diff --git a/src/arch/mips/stages.c b/src/arch/mips/stages.c index ae10594288..79b2ea4cd8 100644 --- a/src/arch/mips/stages.c +++ b/src/arch/mips/stages.c @@ -20,7 +20,7 @@ #include <arch/stages.h> #include <arch/cache.h> - __attribute__((section(".text.stage_entry.mips"))) void stage_entry(void) +void stage_entry(void) { main(); } |