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-rw-r--r--src/arch/armv7/Makefile.inc40
-rw-r--r--src/arch/armv7/bootblock_simple.c8
-rw-r--r--src/arch/armv7/coreboot_ram.ld1
-rw-r--r--src/arch/armv7/include/arch/stages.h (renamed from src/arch/armv7/romstage_main.c)17
-rw-r--r--src/arch/armv7/lib/Makefile.inc2
-rw-r--r--src/arch/armv7/lib/c_start.S9
-rw-r--r--src/arch/armv7/romstage.ld2
-rw-r--r--src/arch/armv7/stages.c45
8 files changed, 77 insertions, 47 deletions
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index ba734a6a81..78fa671cb5 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -104,6 +104,14 @@ $(objcbfs)/%.elf: $(objcbfs)/%.debug
$(OBJCOPY) --add-gnu-debuglink=$< $@.tmp
mv $@.tmp $@
+stages_c = $(src)/arch/armv7/stages.c
+stages_o = $(obj)/arch/armv7/stages.o
+
+$(stages_o): $(stages_c)
+ @printf " CC $(subst $(obj)/,,$(@))\n"
+ $(CC) -Wa,-acdlns -I. $(INCLUDES) -c -o $@ $< -marm
+
+
################################################################################
# Build the coreboot_ram (stage 2)
@@ -115,12 +123,12 @@ else
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/coreboot_ram.ld $<
endif
-$(objgenerated)/coreboot_ram.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME)
+$(objgenerated)/coreboot_ram.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME)
@printf " CC $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
$(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --wrap __do_div64 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
else
- $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+ $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
################################################################################
@@ -239,18 +247,11 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc)
@printf " GEN $(subst $(obj)/,,$(@))\n"
printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
-bootblock_exit_c = $(src)/arch/armv7/bootblock_exit.c
-bootblock_exit_o = $(obj)/arch/armv7/bootblock_exit.o
-
-$(bootblock_exit_o): $(bootblock_exit_c)
- @printf " CC $(subst $(obj)/,,$(@))\n"
- $(CC) -Wa,-acdlns -I. $(INCLUDES) -c -o $@ $< -marm
-
$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s
@printf " CC $(subst $(obj)/,,$(@))\n"
$(CC) -Wa,-acdlns -c -o $@ $< > $(basename $@).disasm
-BOOTBLOCK_OBJS = $(objgenerated)/bootblock.o $(bootblock_exit_o)
+#BOOTBLOCK_OBJS = $(objgenerated)/bootblock.o $(bootblock_exit_o)
$(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h
@printf " CC $(subst $(obj)/,,$(@))\n"
@@ -262,39 +263,32 @@ $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_S
$< > $(objgenerated)/bootblock.inc.d
$(CC) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@
-$(objcbfs)/bootblock.debug: $(BOOTBLOCK_OBJS) $(objgenerated)/bootblock.ld
+$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
$(LD) -m armelf_linux_eabi -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld
else
- $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(BOOTBLOCK_OBJS) $(LIBGCC_FILE_NAME) -Wl,--end-group
+ $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(stages) $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
################################################################################
# Build the romstage
-romstage_main_c = $(src)/arch/armv7/romstage_main.c
-romstage_main_o = $(obj)/arch/armv7/romstage_main.o
-
-$(romstage_main_o): $(romstage_main_c)
- @printf " CC $(subst $(obj)/,,$(@))\n"
- $(CC) -nostdlib -nostartfiles -static -c -o $@ $< -marm
-
# FIXME(dhendrix): added debug printfs
-$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(romstage_main_o) $(objgenerated)/romstage_null.ld
+$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage_null.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_null.ld
else
- $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--start-group $(romstage-objs) $(romstage_main_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
+ $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
$(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
- $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) $(romstage_main_o) -T $(objgenerated)/romstage_xip.ld
+ $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) $(stages_o) -T $(objgenerated)/romstage_xip.ld
else
- $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--start-group $(romstage-objs) $(romstage_main_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
+ $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
$(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions
diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c
index d97075e2f8..8df7e6a70d 100644
--- a/src/arch/armv7/bootblock_simple.c
+++ b/src/arch/armv7/bootblock_simple.c
@@ -20,9 +20,11 @@
*/
#include <bootblock_common.h>
-#include <arch/bootblock_exit.h>
#include <arch/cbfs.h>
#include <arch/hlt.h>
+#include <arch/stages.h>
+
+#include "stages.c"
static int boot_cpu(void)
{
@@ -34,7 +36,7 @@ static int boot_cpu(void)
return 1;
}
-void main(unsigned long bist)
+void main(void)
{
const char *target1 = "fallback/romstage";
unsigned long romstage_entry;
@@ -49,6 +51,6 @@ void main(unsigned long bist)
CBFS_DEFAULT_MEDIA, target1);
printk(BIOS_INFO, "bootblock main(): jumping to romstage\n");
- if (romstage_entry) bootblock_exit(romstage_entry);
+ if (romstage_entry) stage_exit(romstage_entry);
hlt();
}
diff --git a/src/arch/armv7/coreboot_ram.ld b/src/arch/armv7/coreboot_ram.ld
index 329bce417d..2f08d1434d 100644
--- a/src/arch/armv7/coreboot_ram.ld
+++ b/src/arch/armv7/coreboot_ram.ld
@@ -32,6 +32,7 @@ SECTIONS
*/
.text : {
_text = .;
+ *(.text.stage_entry.armv7);
*(.text);
*(.text.*);
. = ALIGN(16);
diff --git a/src/arch/armv7/romstage_main.c b/src/arch/armv7/include/arch/stages.h
index 0b463b8f1f..215aaa8086 100644
--- a/src/arch/armv7/romstage_main.c
+++ b/src/arch/armv7/include/arch/stages.h
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
+ * Copyright (C) 2013 The ChromiumOS Authors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,13 +17,12 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-void main(void);
+#ifndef __ARCH_STAGES_H
+#define __ARCH_STAGES_H
-/* romstage_main is simply a stub to invoke main(), to handle ARM mode switching
- * (ARM/Thumb) properly. */
+extern void main(void);
-void romstage_main(void) __attribute__((section(".text.entry.armv7")));
-void romstage_main(void)
-{
- main();
-}
+void stage_entry(void) __attribute__((section(".text.stage_entry.armv7")));
+void stage_exit(unsigned long);
+
+#endif
diff --git a/src/arch/armv7/lib/Makefile.inc b/src/arch/armv7/lib/Makefile.inc
index d9113419f5..e52bc5412d 100644
--- a/src/arch/armv7/lib/Makefile.inc
+++ b/src/arch/armv7/lib/Makefile.inc
@@ -9,8 +9,6 @@ romstage-y += syslib.c
#ramstage-y += printk_init.c
#romstage-y += walkcbfs.S
-ramstage-y += c_start.S
-
ramstage-y += div0.c
ramstage-y += div64.S
ramstage-y += hang_spl.c
diff --git a/src/arch/armv7/lib/c_start.S b/src/arch/armv7/lib/c_start.S
deleted file mode 100644
index b6e746299d..0000000000
--- a/src/arch/armv7/lib/c_start.S
+++ /dev/null
@@ -1,9 +0,0 @@
-.section ".text"
-.globl _start
-_start:
- bl _hardwaremain
-
-_hardwaremain: .word hardwaremain
-@ .word hardwaremain
-
-
diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld
index b4bc29d196..6728fb11fa 100644
--- a/src/arch/armv7/romstage.ld
+++ b/src/arch/armv7/romstage.ld
@@ -38,7 +38,7 @@ SECTIONS
.romtext . : {
_rom = .;
_start = .;
- *(.text.entry.armv7);
+ *(.text.stage_entry.armv7);
*(.text.startup);
*(.text);
}
diff --git a/src/arch/armv7/stages.c b/src/arch/armv7/stages.c
new file mode 100644
index 0000000000..fd4374ff9c
--- /dev/null
+++ b/src/arch/armv7/stages.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * This file contains entry/exit functions for each stage during coreboot
+ * execution (bootblock entry and ramstage exit will depend on external
+ * loading.
+ *
+ * Unlike other files, this one should be compiled with a -m option to
+ * specify a pre-determined instruction set. The is to ensure consistency
+ * in the CPU operating mode (ARM or Thumb) when hand-off between stages
+ * occurs.
+ *
+ * Entry points must be placed at the location the previous stage jumps
+ * to (the lowest address in the stage image). This is done by giving
+ * stage_entry() its own section in .text and placing it first in the
+ * linker script.
+ */
+
+#include <arch/stages.h>
+
+void stage_entry(void)
+{
+ main();
+}
+
+void stage_exit(unsigned long addr)
+{
+ __attribute__((noreturn)) void (*doit)(void) = (void *)addr;
+ doit();
+}
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-31 08:20:20 +0000