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diff --git a/Documentation/Intel/fsp1_1.html b/Documentation/Intel/fsp1_1.html index e08be830ff..456db802a8 100644 --- a/Documentation/Intel/fsp1_1.html +++ b/Documentation/Intel/fsp1_1.html @@ -14,6 +14,7 @@ </p> <ol> <li><a href="#RequiredFiles">Required Files</a></li> + <li>Add the <a href="#FspBinary">FSP Binary File</a> to the coreboot File System</li> </ol> <p> @@ -45,6 +46,18 @@ <hr> +<h1><a name="FspBinary">Add the FSP Binary File to coreboot File System</a></h1> +<p> + Add the FSP binary to the coreboot flash image using the following command: +</p> +<pre><code>util/cbfstool/cbfstool build/coreboot.rom add -t fsp -n fsp.bin -b <base address> -f fsp.bin</code></pre> +<p> + This command relocates the FSP binary to the 4K byte aligned location in CBFS so that the + FSP code for TempRamInit may be executed in place. +</p> + + +<hr> <p>Modified: 31 January 2016</p> </body> </html>
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