diff options
| -rw-r--r-- | src/soc/rockchip/rk3399/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3399/bootblock.c | 2 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3399/include/soc/mmu_operations.h | 30 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3399/mmu_operations.c | 37 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3399/romstage.c | 9 |
5 files changed, 80 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc index 718426b137..40c652fcf2 100644 --- a/src/soc/rockchip/rk3399/Makefile.inc +++ b/src/soc/rockchip/rk3399/Makefile.inc @@ -23,6 +23,7 @@ bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c endif bootblock-y += bootblock.c bootblock-y += clock.c +bootblock-y += mmu_operations.c bootblock-y += timer.c verstage-y += ../common/cbmem.c @@ -39,6 +40,7 @@ romstage-y += sdram.c romstage-y += ../common/spi.c romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += clock.c +romstage-y += mmu_operations.c romstage-y += timer.c romstage-y += romstage.c diff --git a/src/soc/rockchip/rk3399/bootblock.c b/src/soc/rockchip/rk3399/bootblock.c index d87f967d5f..3291511aba 100644 --- a/src/soc/rockchip/rk3399/bootblock.c +++ b/src/soc/rockchip/rk3399/bootblock.c @@ -14,10 +14,12 @@ */ #include <bootblock_common.h> +#include <soc/mmu_operations.h> #include <soc/clock.h> void bootblock_soc_init(void) { rkclk_init(); rkclk_configure_cpu(APLL_L_600_MHZ); + rockchip_mmu_init(); } diff --git a/src/soc/rockchip/rk3399/include/soc/mmu_operations.h b/src/soc/rockchip/rk3399/include/soc/mmu_operations.h new file mode 100644 index 0000000000..d8a6016349 --- /dev/null +++ b/src/soc/rockchip/rk3399/include/soc/mmu_operations.h @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __SOC_ROCKCHIP_RK3399_MMU_H__ +#define __SOC_ROCKCHIP_RK3399_MMU_H__ + +#include <arch/mmu.h> + +enum { + DEV_MEM = MA_DEV | MA_S | MA_RW, + CACHED_MEM = MA_MEM | MA_NS | MA_RW, + SECURE_MEM = MA_MEM | MA_S | MA_RW, + UNCACHED_MEM = MA_MEM | MA_NS | MA_RW | MA_MEM_NC, +}; + +void rockchip_mmu_init(void); +#endif diff --git a/src/soc/rockchip/rk3399/mmu_operations.c b/src/soc/rockchip/rk3399/mmu_operations.c new file mode 100644 index 0000000000..f1a1371683 --- /dev/null +++ b/src/soc/rockchip/rk3399/mmu_operations.c @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <arch/io.h> +#include <arch/mmu.h> +#include <bootblock_common.h> +#include <console/console.h> +#include <soc/mmu_operations.h> +#include <symbols.h> + +void rockchip_mmu_init(void) +{ + mmu_init(); + + /* Set 0x0 to max sdram(4GiB) supported by RK3399 as device memory. + * We want to configure mmio space(start at 0xf8000000) to DEV_MEM, + * some boards may use 2GB sdram in future(who knows). + */ + mmu_config_range((void *)0, (uintptr_t)4 * GiB, DEV_MEM); + + mmu_config_range(_sram, _sram_size, SECURE_MEM); + + mmu_enable(); +} diff --git a/src/soc/rockchip/rk3399/romstage.c b/src/soc/rockchip/rk3399/romstage.c index 4786937acc..93eb41a168 100644 --- a/src/soc/rockchip/rk3399/romstage.c +++ b/src/soc/rockchip/rk3399/romstage.c @@ -18,17 +18,26 @@ #include <arch/cpu.h> #include <arch/exception.h> #include <arch/io.h> +#include <arch/mmu.h> #include <cbfs.h> #include <console/console.h> #include <delay.h> #include <program_loading.h> #include <romstage_handoff.h> #include <symbols.h> +#include <soc/mmu_operations.h> + +static const uint64_t dram_size = (uint64_t)CONFIG_DRAM_SIZE_MB * MiB; void main(void) { console_init(); exception_init(); + + /*TODO: need implement sdram init */ + + mmu_config_range((void *)0, (uintptr_t)dram_size, CACHED_MEM); + mmu_config_range(_dma_coherent, _dma_coherent_size, UNCACHED_MEM); cbmem_initialize_empty(); run_ramstage(); } |