diff options
| -rw-r--r-- | src/soc/mediatek/mt8188/pll.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/mediatek/mt8188/pll.c b/src/soc/mediatek/mt8188/pll.c index a519fdd876..176b8845fd 100644 --- a/src/soc/mediatek/mt8188/pll.c +++ b/src/soc/mediatek/mt8188/pll.c @@ -435,19 +435,19 @@ static const struct pll plls[] = { NO_RSTB_SHIFT, 22, adsppll_con1, 24, adsppll_con1, 0, pll_div_rate), PLL(APMIXED_APLL1, apll1_con0, apll1_con4, - NO_RSTB_SHIFT, 32, apll1_con2, 24, apll1_con2, 0, + NO_RSTB_SHIFT, 32, apll1_con1, 24, apll1_con2, 0, pll_div_rate), PLL(APMIXED_APLL2, apll2_con0, apll2_con4, - NO_RSTB_SHIFT, 32, apll2_con2, 24, apll2_con2, 0, + NO_RSTB_SHIFT, 32, apll2_con1, 24, apll2_con2, 0, pll_div_rate), PLL(APMIXED_APLL3, apll3_con0, apll3_con4, - NO_RSTB_SHIFT, 32, apll3_con2, 24, apll3_con2, 0, + NO_RSTB_SHIFT, 32, apll3_con1, 24, apll3_con2, 0, pll_div_rate), PLL(APMIXED_APLL4, apll4_con0, apll4_con4, - NO_RSTB_SHIFT, 32, apll4_con2, 24, apll4_con2, 0, + NO_RSTB_SHIFT, 32, apll4_con1, 24, apll4_con2, 0, pll_div_rate), PLL(APMIXED_APLL5, apll5_con0, apll5_con4, - NO_RSTB_SHIFT, 32, apll5_con2, 24, apll5_con2, 0, + NO_RSTB_SHIFT, 32, apll5_con1, 24, apll5_con2, 0, pll_div_rate), PLL(APMIXED_MFGPLL, mfgpll_con0, mfgpll_con3, NO_RSTB_SHIFT, 22, mfgpll_con1, 24, mfgpll_con1, 0, |