diff options
| -rw-r--r-- | src/mainboard/google/geralt/bootblock.c | 1 | ||||
| -rw-r--r-- | src/mainboard/google/geralt/chromeos.c | 20 | ||||
| -rw-r--r-- | src/mainboard/google/geralt/gpio.h | 5 |
3 files changed, 25 insertions, 1 deletions
diff --git a/src/mainboard/google/geralt/bootblock.c b/src/mainboard/google/geralt/bootblock.c index 9a76b368ca..4476aab2b8 100644 --- a/src/mainboard/google/geralt/bootblock.c +++ b/src/mainboard/google/geralt/bootblock.c @@ -13,5 +13,6 @@ void bootblock_mainboard_init(void) mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST); mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0); mtk_snfc_init(); + setup_chromeos_gpios(); gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING); } diff --git a/src/mainboard/google/geralt/chromeos.c b/src/mainboard/google/geralt/chromeos.c index eb93be20c4..1723e6bfa8 100644 --- a/src/mainboard/google/geralt/chromeos.c +++ b/src/mainboard/google/geralt/chromeos.c @@ -7,9 +7,27 @@ #include "gpio.h" +void setup_chromeos_gpios(void) +{ + /* Set up open-drain pins */ + gpio_input(GPIO_EC_AP_INT_ODL); + gpio_input(GPIO_GSC_AP_INT_ODL); + gpio_input(GPIO_AP_WP_ODL); + + /* Set up GPOs */ + gpio_output(GPIO_AP_EC_WARM_RST_REQ, 0); + gpio_output(GPIO_EN_SPKR, 0); + gpio_output(GPIO_XHCI_INIT_DONE, 0); +} + void fill_lb_gpios(struct lb_gpios *gpios) { - /* TODO: add Chrome specific gpios */ + struct lb_gpio chromeos_gpios[] = { + {GPIO_EC_AP_INT_ODL.id, ACTIVE_LOW, -1, "EC interrupt"}, + {GPIO_GSC_AP_INT_ODL.id, ACTIVE_HIGH, -1, "TPM interrupt"}, + {GPIO_EN_SPKR.id, ACTIVE_HIGH, -1, "speaker enable"}, + }; + lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } int tis_plat_irq_status(void) diff --git a/src/mainboard/google/geralt/gpio.h b/src/mainboard/google/geralt/gpio.h index ff6de17563..5be09ce479 100644 --- a/src/mainboard/google/geralt/gpio.h +++ b/src/mainboard/google/geralt/gpio.h @@ -6,7 +6,12 @@ #include <soc/gpio.h> #define GPIO_AP_EC_WARM_RST_REQ GPIO(DPI_HSYNC) +#define GPIO_AP_WP_ODL GPIO(GPIO15) +#define GPIO_BEEP_ON_OD GPIO(I2SIN_WS) +#define GPIO_EC_AP_INT_ODL GPIO(DPI_DE) +#define GPIO_EN_SPKR GPIO(I2SIN_D2) #define GPIO_GSC_AP_INT_ODL GPIO(GPIO00) +#define GPIO_XHCI_INIT_DONE GPIO(DPI_CK) void setup_chromeos_gpios(void); |