diff options
| -rw-r--r-- | src/soc/intel/skylake/pmc.c | 18 | ||||
| -rw-r--r-- | src/soc/intel/skylake/pmutil.c | 14 |
2 files changed, 14 insertions, 18 deletions
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index 14e9d4ce81..c70710f9c2 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -14,24 +14,6 @@ #include "chip.h" -void pmc_set_disb(void) -{ - /* Set the DISB after DRAM init */ - u32 disb_val; -#if defined(__SIMPLE_DEVICE__) - pci_devfn_t dev = PCH_DEV_PMC; -#else - struct device *dev = PCH_DEV_PMC; -#endif - - disb_val = pci_read_config32(dev, GEN_PMCON_A); - disb_val |= DISB; - - /* Don't clear bits that are write-1-to-clear */ - disb_val &= ~(GBL_RST_STS | MS4V); - pci_write_config32(dev, GEN_PMCON_A, disb_val); -} - /* * Set which power state system will be after reapplying * the power (from G3 State) diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index 115a9e58ec..35862c278b 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -113,6 +113,20 @@ const char *const *soc_std_gpe_sts_array(size_t *gpe_arr) return gpe_sts_bits; } +void pmc_set_disb(void) +{ + /* Set the DISB after DRAM init */ + u32 disb_val; + const pci_devfn_t dev = PCH_DEV_PMC; + + disb_val = pci_read_config32(dev, GEN_PMCON_A); + disb_val |= DISB; + + /* Don't clear bits that are write-1-to-clear */ + disb_val &= ~(GBL_RST_STS | MS4V); + pci_write_config32(dev, GEN_PMCON_A, disb_val); +} + uint8_t *pmc_mmio_regs(void) { uint32_t reg32; |