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-rw-r--r--src/soc/amd/cezanne/chipset.cb6
-rw-r--r--src/soc/amd/genoa/chipset.cb48
-rw-r--r--src/soc/amd/glinda/chipset.cb6
-rw-r--r--src/soc/amd/mendocino/chipset_mendocino.cb6
-rw-r--r--src/soc/amd/mendocino/chipset_rembrandt.cb6
-rw-r--r--src/soc/amd/phoenix/chipset.cb10
-rw-r--r--src/soc/amd/picasso/chipset.cb4
-rw-r--r--src/soc/amd/stoneyridge/chipset_cz.cb4
-rw-r--r--src/soc/amd/stoneyridge/chipset_st.cb2
9 files changed, 46 insertions, 46 deletions
diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb
index 0762ea1d26..ccce4859d8 100644
--- a/src/soc/amd/cezanne/chipset.cb
+++ b/src/soc/amd/cezanne/chipset.cb
@@ -7,12 +7,12 @@ chip soc/amd/cezanne
device pci 00.0 alias gnb on ops cezanne_root_complex_operations end
device pci 00.2 alias iommu off ops amd_iommu_ops end
- device pci 01.0 on end # Dummy Host Bridge, do not disable
+ device pci 01.0 on end # Dummy device function, do not disable
device pci 01.1 alias gpp_gfx_bridge_0 off ops amd_external_pcie_gpp_ops end
device pci 01.2 alias gpp_gfx_bridge_1 off ops amd_external_pcie_gpp_ops end
device pci 01.3 alias gpp_gfx_bridge_2 off ops amd_external_pcie_gpp_ops end
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end
device pci 02.2 alias gpp_bridge_1 off ops amd_external_pcie_gpp_ops end
device pci 02.3 alias gpp_bridge_2 off ops amd_external_pcie_gpp_ops end
@@ -21,7 +21,7 @@ chip soc/amd/cezanne
device pci 02.6 alias gpp_bridge_5 off ops amd_external_pcie_gpp_ops end
device pci 02.7 alias gpp_bridge_6 off ops amd_external_pcie_gpp_ops end
- device pci 08.0 on end # Dummy Host Bridge, do not disable
+ device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)
diff --git a/src/soc/amd/genoa/chipset.cb b/src/soc/amd/genoa/chipset.cb
index 0f543e74c1..1e90eb58fc 100644
--- a/src/soc/amd/genoa/chipset.cb
+++ b/src/soc/amd/genoa/chipset.cb
@@ -9,7 +9,7 @@ chip soc/amd/genoa
device pci 00.2 alias iommu_0 on ops amd_iommu_ops end
device pci 00.3 alias rcec_0 off end
- device pci 01.0 on end # Dummy Host Bridge, do not disable
+ device pci 01.0 on end # Dummy device function, do not disable
device pci 01.1 alias gpp_bridge_0_0_a off end
device pci 01.2 alias gpp_bridge_0_1_a off end
device pci 01.3 alias gpp_bridge_0_2_a off end
@@ -18,11 +18,11 @@ chip soc/amd/genoa
device pci 01.6 alias gpp_bridge_0_5_a off end
device pci 01.7 alias gpp_bridge_0_6_a off end
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0_7_a off end
device pci 02.2 alias gpp_bridge_0_8_a off end
- device pci 03.0 on end # Dummy Host Bridge, do not disable
+ device pci 03.0 on end # Dummy device function, do not disable
device pci 03.1 alias gpp_bridge_0_0_b off end
device pci 03.2 alias gpp_bridge_0_1_b off end
device pci 03.3 alias gpp_bridge_0_2_b off end
@@ -31,17 +31,17 @@ chip soc/amd/genoa
device pci 03.6 alias gpp_bridge_0_5_b off end
device pci 03.7 alias gpp_bridge_0_6_b off end
- device pci 04.0 on end # Dummy Host Bridge, do not disable
+ device pci 04.0 on end # Dummy device function, do not disable
device pci 04.1 alias gpp_bridge_0_7_b off end
device pci 04.2 alias gpp_bridge_0_8_b off end
- device pci 05.0 on end # Dummy Host Bridge, do not disable
+ device pci 05.0 on end # Dummy device function, do not disable
device pci 05.1 alias gpp_bridge_0_0_c off end
device pci 05.2 alias gpp_bridge_0_1_c off end
device pci 05.3 alias gpp_bridge_0_2_c off end
device pci 05.4 alias gpp_bridge_0_3_c off end
- device pci 07.0 on end # Dummy Host Bridge, do not disable
+ device pci 07.0 on end # Dummy device function, do not disable
device pci 07.1 alias gpp_bridge_0_a off # Internal GPP Bridge 0 to Bus B0
device pci 0.0 off end # Dummy PCIe function
device pci 0.1 off end
@@ -77,7 +77,7 @@ chip soc/amd/genoa
device pci 00.2 alias iommu_1 on ops amd_iommu_ops end
device pci 00.3 alias rcec_1 off end
- device pci 01.0 on end # Dummy Host Bridge, do not disable
+ device pci 01.0 on end # Dummy device function, do not disable
device pci 01.1 alias gpp_bridge_1_0_a off end
device pci 01.2 alias gpp_bridge_1_1_a off end
device pci 01.3 alias gpp_bridge_1_2_a off end
@@ -86,11 +86,11 @@ chip soc/amd/genoa
device pci 01.6 alias gpp_bridge_1_5_a off end
device pci 01.7 alias gpp_bridge_1_6_a off end
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_1_7_a off end
device pci 02.2 alias gpp_bridge_1_8_a off end
- device pci 03.0 on end # Dummy Host Bridge, do not disable
+ device pci 03.0 on end # Dummy device function, do not disable
device pci 03.1 alias gpp_bridge_1_0_b off end
device pci 03.2 alias gpp_bridge_1_1_b off end
device pci 03.3 alias gpp_bridge_1_2_b off end
@@ -99,13 +99,13 @@ chip soc/amd/genoa
device pci 03.6 alias gpp_bridge_1_5_b off end
device pci 03.7 alias gpp_bridge_1_6_b off end
- device pci 04.0 on end # Dummy Host Bridge, do not disable
+ device pci 04.0 on end # Dummy device function, do not disable
device pci 04.1 alias gpp_bridge_1_7_b off end
device pci 04.2 alias gpp_bridge_1_8_b off end
- device pci 05.0 on end # Dummy Host Bridge, do not disable
+ device pci 05.0 on end # Dummy device function, do not disable
- device pci 07.0 on end # Dummy Host Bridge, do not disable
+ device pci 07.0 on end # Dummy device function, do not disable
device pci 07.1 alias gpp_bridge_1_a off
device pci 0.0 off end # Dummy PCIe function
device pci 0.1 off end #SDXI
@@ -118,7 +118,7 @@ chip soc/amd/genoa
device pci 00.2 alias iommu_2 on ops amd_iommu_ops end
device pci 00.3 alias rcec_2 off end
- device pci 01.0 on end # Dummy Host Bridge, do not disable
+ device pci 01.0 on end # Dummy device function, do not disable
device pci 01.1 alias gpp_bridge_2_0_a off end
device pci 01.2 alias gpp_bridge_2_1_a off end
device pci 01.3 alias gpp_bridge_2_2_a off end
@@ -127,11 +127,11 @@ chip soc/amd/genoa
device pci 01.6 alias gpp_bridge_2_5_a off end
device pci 01.7 alias gpp_bridge_2_6_a off end
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_2_7_a off end
device pci 02.2 alias gpp_bridge_2_8_a off end
- device pci 03.0 on end # Dummy Host Bridge, do not disable
+ device pci 03.0 on end # Dummy device function, do not disable
device pci 03.1 alias gpp_bridge_2_0_b off end
device pci 03.2 alias gpp_bridge_2_1_b off end
device pci 03.3 alias gpp_bridge_2_2_b off end
@@ -140,13 +140,13 @@ chip soc/amd/genoa
device pci 03.6 alias gpp_bridge_2_5_b off end
device pci 03.7 alias gpp_bridge_2_6_b off end
- device pci 04.0 on end # Dummy Host Bridge, do not disable
+ device pci 04.0 on end # Dummy device function, do not disable
device pci 04.1 alias gpp_bridge_2_7_b off end
device pci 04.2 alias gpp_bridge_2_8_b off end
- device pci 05.0 on end # Dummy Host Bridge, do not disable
+ device pci 05.0 on end # Dummy device function, do not disable
- device pci 07.0 on end # Dummy Host Bridge, do not disable
+ device pci 07.0 on end # Dummy device function, do not disable
device pci 07.1 alias gpp_bridge_2_a off
device pci 0.0 off end # Dummy PCIe function
device pci 0.1 off end
@@ -159,7 +159,7 @@ chip soc/amd/genoa
device pci 00.2 alias iommu_3 on ops amd_iommu_ops end
device pci 00.3 alias rcec_3 off end
- device pci 01.0 on end # Dummy Host Bridge, do not disable
+ device pci 01.0 on end # Dummy device function, do not disable
device pci 01.1 alias gpp_bridge_3_0_a off end
device pci 01.2 alias gpp_bridge_3_1_a off end
device pci 01.3 alias gpp_bridge_3_2_a off end
@@ -168,11 +168,11 @@ chip soc/amd/genoa
device pci 01.6 alias gpp_bridge_3_5_a off end
device pci 01.7 alias gpp_bridge_3_6_a off end
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_3_7_a off end
device pci 02.2 alias gpp_bridge_3_8_a off end
- device pci 03.0 on end # Dummy Host Bridge, do not disable
+ device pci 03.0 on end # Dummy device function, do not disable
device pci 03.1 alias gpp_bridge_3_0_b off end
device pci 03.2 alias gpp_bridge_3_1_b off end
device pci 03.3 alias gpp_bridge_3_2_b off end
@@ -181,17 +181,17 @@ chip soc/amd/genoa
device pci 03.6 alias gpp_bridge_3_5_b off end
device pci 03.7 alias gpp_bridge_3_6_b off end
- device pci 04.0 on end # Dummy Host Bridge, do not disable
+ device pci 04.0 on end # Dummy device function, do not disable
device pci 04.1 alias gpp_bridge_3_7_b off end
device pci 04.2 alias gpp_bridge_3_8_b off end
- device pci 05.0 on end # Dummy Host Bridge, do not disable
+ device pci 05.0 on end # Dummy device function, do not disable
device pci 05.1 alias gpp_bridge_3_0_c off end
device pci 05.2 alias gpp_bridge_3_1_c off end
device pci 05.3 alias gpp_bridge_3_2_c off end
device pci 05.4 alias gpp_bridge_3_3_c off end
- device pci 07.0 on end # Dummy Host Bridge, do not disable
+ device pci 07.0 on end # Dummy device function, do not disable
device pci 07.1 alias gpp_bridge_3_a off
device pci 0.0 off end # Dummy PCIe function
device pci 0.1 off end #SDXI
diff --git a/src/soc/amd/glinda/chipset.cb b/src/soc/amd/glinda/chipset.cb
index bf7d67d81b..3d0e11931c 100644
--- a/src/soc/amd/glinda/chipset.cb
+++ b/src/soc/amd/glinda/chipset.cb
@@ -9,9 +9,9 @@ chip soc/amd/glinda
device pci 00.0 alias gnb on ops glinda_root_complex_operations end
device pci 00.2 alias iommu off ops amd_iommu_ops end
- device pci 01.0 on end # Dummy Host Bridge
+ device pci 01.0 on end # Dummy device function
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end
device pci 02.2 alias gpp_bridge_1 off ops amd_external_pcie_gpp_ops end
device pci 02.3 alias gpp_bridge_2 off ops amd_external_pcie_gpp_ops end
@@ -19,7 +19,7 @@ chip soc/amd/glinda
device pci 02.5 alias gpp_bridge_4 off ops amd_external_pcie_gpp_ops end
device pci 02.6 alias gpp_bridge_5 off ops amd_external_pcie_gpp_ops end
- device pci 08.0 on end # Dummy Host Bridge, do not disable
+ device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)
diff --git a/src/soc/amd/mendocino/chipset_mendocino.cb b/src/soc/amd/mendocino/chipset_mendocino.cb
index e40124f6ff..6ee1e63f18 100644
--- a/src/soc/amd/mendocino/chipset_mendocino.cb
+++ b/src/soc/amd/mendocino/chipset_mendocino.cb
@@ -7,15 +7,15 @@ chip soc/amd/mendocino
device pci 00.0 alias gnb on ops mendocino_root_complex_operations end
device pci 00.2 alias iommu off ops amd_iommu_ops end
- device pci 01.0 on end # Dummy Host Bridge
+ device pci 01.0 on end # Dummy device function
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0 hidden ops amd_external_pcie_gpp_ops end
device pci 02.2 alias gpp_bridge_1 hidden ops amd_external_pcie_gpp_ops end
device pci 02.3 alias gpp_bridge_2 hidden ops amd_external_pcie_gpp_ops end
device pci 02.4 alias gpp_bridge_3 hidden ops amd_external_pcie_gpp_ops end
- device pci 08.0 on end # Dummy Host Bridge, do not disable
+ device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)
diff --git a/src/soc/amd/mendocino/chipset_rembrandt.cb b/src/soc/amd/mendocino/chipset_rembrandt.cb
index 394f057bfa..ef3bfa9a56 100644
--- a/src/soc/amd/mendocino/chipset_rembrandt.cb
+++ b/src/soc/amd/mendocino/chipset_rembrandt.cb
@@ -7,9 +7,9 @@ chip soc/amd/mendocino
device pci 00.0 alias gnb on ops mendocino_root_complex_operations end
device pci 00.2 alias iommu off ops amd_iommu_ops end
- device pci 01.0 on end # Dummy Host Bridge
+ device pci 01.0 on end # Dummy device function
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0 hidden ops amd_external_pcie_gpp_ops end
device pci 02.2 alias gpp_bridge_1 hidden ops amd_external_pcie_gpp_ops end
device pci 02.3 alias gpp_bridge_2 hidden ops amd_external_pcie_gpp_ops end
@@ -17,7 +17,7 @@ chip soc/amd/mendocino
device pci 02.5 alias gpp_bridge_4 hidden ops amd_external_pcie_gpp_ops end
device pci 02.6 alias gpp_bridge_5 hidden ops amd_external_pcie_gpp_ops end
- device pci 08.0 on end # Dummy Host Bridge, do not disable
+ device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)
diff --git a/src/soc/amd/phoenix/chipset.cb b/src/soc/amd/phoenix/chipset.cb
index 12bb2fe659..08ee8c20cf 100644
--- a/src/soc/amd/phoenix/chipset.cb
+++ b/src/soc/amd/phoenix/chipset.cb
@@ -9,14 +9,14 @@ chip soc/amd/phoenix
device pci 00.0 alias gnb on ops phoenix_root_complex_operations end
device pci 00.2 alias iommu off ops amd_iommu_ops end
- device pci 01.0 on end # Dummy Host Bridge, do not disable
+ device pci 01.0 on end # Dummy device function, do not disable
# The PCIe GPP aliases in this SoC match the device and function numbers
device pci 01.1 alias gpp_bridge_1_1 hidden ops amd_external_pcie_gpp_ops end
device pci 01.2 alias gpp_bridge_1_2 hidden ops amd_external_pcie_gpp_ops end
device pci 01.3 alias gpp_bridge_1_3 hidden ops amd_external_pcie_gpp_ops end
device pci 01.4 alias gpp_bridge_1_4 hidden ops amd_external_pcie_gpp_ops end
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
# The PCIe GPP aliases in this SoC match the device and function numbers
device pci 02.1 alias gpp_bridge_2_1 hidden ops amd_external_pcie_gpp_ops end
device pci 02.2 alias gpp_bridge_2_2 hidden ops amd_external_pcie_gpp_ops end
@@ -25,13 +25,13 @@ chip soc/amd/phoenix
device pci 02.5 alias gpp_bridge_2_5 hidden ops amd_external_pcie_gpp_ops end
device pci 02.6 alias gpp_bridge_2_6 hidden ops amd_external_pcie_gpp_ops end
- device pci 03.0 on end # Dummy Host Bridge, do not disable
+ device pci 03.0 on end # Dummy device function, do not disable
device pci 03.1 alias usb4_pcie_bridge_0 off end
- device pci 04.0 on end # Dummy Host Bridge, do not disable
+ device pci 04.0 on end # Dummy device function, do not disable
device pci 04.1 alias usb4_pcie_bridge_1 off end
- device pci 08.0 on end # Dummy Host Bridge, do not disable
+ device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)
diff --git a/src/soc/amd/picasso/chipset.cb b/src/soc/amd/picasso/chipset.cb
index ed545638e8..c11d502f16 100644
--- a/src/soc/amd/picasso/chipset.cb
+++ b/src/soc/amd/picasso/chipset.cb
@@ -8,7 +8,7 @@ chip soc/amd/picasso
ops picasso_pci_domain_ops
device pci 00.0 alias gnb on ops picasso_root_complex_operations end
device pci 00.2 alias iommu off ops amd_iommu_ops end
- device pci 01.0 on end # Dummy Host Bridge, do not disable
+ device pci 01.0 on end # Dummy device function, do not disable
device pci 01.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end
device pci 01.2 alias gpp_bridge_1 off ops amd_external_pcie_gpp_ops end
device pci 01.3 alias gpp_bridge_2 off ops amd_external_pcie_gpp_ops end
@@ -16,7 +16,7 @@ chip soc/amd/picasso
device pci 01.5 alias gpp_bridge_4 off ops amd_external_pcie_gpp_ops end
device pci 01.6 alias gpp_bridge_5 off ops amd_external_pcie_gpp_ops end
device pci 01.7 alias gpp_bridge_6 off ops amd_external_pcie_gpp_ops end
- device pci 08.0 on end # Dummy Host Bridge, do not disable
+ device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias internal_bridge_a off # internal bridge to bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # internal GPU
diff --git a/src/soc/amd/stoneyridge/chipset_cz.cb b/src/soc/amd/stoneyridge/chipset_cz.cb
index 1122ae8330..d45c6d7d56 100644
--- a/src/soc/amd/stoneyridge/chipset_cz.cb
+++ b/src/soc/amd/stoneyridge/chipset_cz.cb
@@ -10,13 +10,13 @@ chip soc/amd/stoneyridge
device pci 00.2 alias iommu off ops amd_iommu_ops end
device pci 01.0 alias gfx off ops amd_graphics_ops end # internal GPU
device pci 01.1 alias gfx_hda off end # display HD Audio controller
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0 off end
device pci 02.2 alias gpp_bridge_1 off end
device pci 02.3 alias gpp_bridge_2 off end
device pci 02.4 alias gpp_bridge_3 off end
device pci 02.5 alias gpp_bridge_4 off end
- device pci 03.0 on end # Dummy Host Bridge, do not disable
+ device pci 03.0 on end # Dummy device function, do not disable
device pci 03.1 alias gfx_bridge_0 off end
device pci 03.2 alias gfx_bridge_1 off end
device pci 03.3 alias gfx_bridge_2 off end
diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb
index fd148a88d6..0039ed97a7 100644
--- a/src/soc/amd/stoneyridge/chipset_st.cb
+++ b/src/soc/amd/stoneyridge/chipset_st.cb
@@ -10,7 +10,7 @@ chip soc/amd/stoneyridge
device pci 00.2 alias iommu off ops amd_iommu_ops end
device pci 01.0 alias gfx off ops amd_graphics_ops end # internal GPU
device pci 01.1 alias gfx_hda off end # display HD Audio controller
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0 off end
device pci 02.2 alias gpp_bridge_1 off end
device pci 02.3 alias gpp_bridge_2 off end
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 14:42:04 +0000