diff options
| -rw-r--r-- | src/mainboard/google/skyrim/variants/winterhold/overridetree.cb | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb index 78a8091ceb..38a9d7c62f 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb @@ -1,6 +1,31 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip soc/amd/mendocino + + register "system_configuration" = "4" + + # TODO : Set DPTC confiuration. Table E (SMT) + # TODO : Table E as default is only for SMT + # TODO : This needs to be cleaned up before b/232946420 can be resolved + # TODO : Here is the separate thread number b/258572474 for Table E (SMT) + register "thermctl_limit_degreeC" = "97" + register "fast_ppt_limit_mW" = "22000" + register "slow_ppt_limit_mW" = "15000" + register "slow_ppt_time_constant_s" = "4" + register "sustained_power_limit_mW" = "12000" + + # Enable STT support + register "stt_control" = "1" + register "stt_pcb_sensor_count" = "2" + register "stt_min_limit" = "7000" + register "stt_m1" = "0x114" + register "stt_m2" = "0x371" + register "stt_c_apu" = "0xE333" + register "stt_alpha_apu" = "0x6666" + register "stt_skin_temp_apu" = "0x3000" + register "stt_error_coeff" = "0x21" + register "stt_error_rate_coefficient" = "0xCCD" + device domain 0 on device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref xhci_1 on # XHCI1 controller |