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-rw-r--r--src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h1
-rw-r--r--src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h1
-rw-r--r--src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h1
-rw-r--r--src/soc/intel/icelake/include/soc/gpio_soc_defs.h1
-rw-r--r--src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h1
-rw-r--r--src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h1
-rw-r--r--src/soc/intel/skylake/include/soc/gpio_soc_defs.h1
-rw-r--r--src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h1
8 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
index 48cbacb8e1..de1452e776 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
@@ -25,7 +25,6 @@
#define GROUP_JTAG 0xE
#define GROUP_HVMOS 0xF
-#define GPIO_NUM_GROUPS 15
#define GPIO_MAX_NUM_PER_GROUP 24
/*
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
index 9396c0bf2a..02ff527923 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
@@ -21,7 +21,6 @@
#define GPP_K 0x9
#define GPP_I 0xA
#define GPP_J 0xB
-#define GPIO_NUM_GROUPS 12
#define GPIO_MAX_NUM_PER_GROUP 24
/*
diff --git a/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h b/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h
index 278c2c63aa..38e8a7e94b 100644
--- a/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h
@@ -22,7 +22,6 @@
#define GPP_GPD 0xA
#define GPP_E 0xD
-#define GPIO_NUM_GROUPS 12
#define GPIO_MAX_NUM_PER_GROUP 24
#define SD_PWR_EN_PIN GPP_H1
diff --git a/src/soc/intel/icelake/include/soc/gpio_soc_defs.h b/src/soc/intel/icelake/include/soc/gpio_soc_defs.h
index 62407dff36..2a7d4241cd 100644
--- a/src/soc/intel/icelake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/icelake/include/soc/gpio_soc_defs.h
@@ -21,7 +21,6 @@
#define GPP_C 0xA
#define GPP_E 0xB
-#define GPIO_NUM_GROUPS 11
#define GPIO_MAX_NUM_PER_GROUP 24
/*
diff --git a/src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h b/src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h
index 25a0625842..6b11ac7b9d 100644
--- a/src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h
@@ -22,7 +22,6 @@
#define GPP_GPD 0xA
#define GPP_E 0xD
-#define GPIO_NUM_GROUPS 12
#define GPIO_MAX_NUM_PER_GROUP 24
#define SD_PWR_EN_PIN GPP_H1
diff --git a/src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h b/src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h
index 727bc20bbb..6edb4779eb 100644
--- a/src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h
+++ b/src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h
@@ -19,7 +19,6 @@
#define GPP_H 7
#define GPP_I 8
#define GPD 9
-#define GPIO_NUM_GROUPS 10
#define GPIO_MAX_NUM_PER_GROUP 24
#define GPIO_DWx_COUNT 2 /* DW0 and DW1 */
diff --git a/src/soc/intel/skylake/include/soc/gpio_soc_defs.h b/src/soc/intel/skylake/include/soc/gpio_soc_defs.h
index af092050b0..47ddd17435 100644
--- a/src/soc/intel/skylake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/skylake/include/soc/gpio_soc_defs.h
@@ -17,7 +17,6 @@
#define GPP_F 5
#define GPP_G 6
#define GPD 7
-#define GPIO_NUM_GROUPS 8
#define GPIO_MAX_NUM_PER_GROUP 24
#define GPIO_DWx_COUNT 2 /* DW0 and DW1 */
diff --git a/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h b/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
index 93dcf206e5..8c37a843ad 100644
--- a/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
+++ b/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
@@ -33,7 +33,6 @@
#define COMM_2 5
#define GPD 0xC
-#define GPIO_NUM_GROUPS 13
#define GPIO_MAX_NUM_PER_GROUP 24
/* Group A */